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A New Synchronizer Design
November 1996 (vol. 45 no. 11)
pp. 1308-1311

Abstract—A new synchronizer design is presented. Current synchronizer designs have certain disadvantages, both in characterization and in the tradeoff between settling time and sampling rate, which are overcome in the new design. Two possible implementations of the synchronizer are discussed.

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Index Terms:
Metastability, synchronizer, asynchronous, synchronization, synchronizer design, flip-flop, synchronous digital systems.
Citation:
Jacqueline Walker, Antonio Cantoni, "A New Synchronizer Design," IEEE Transactions on Computers, vol. 45, no. 11, pp. 1308-1311, Nov. 1996, doi:10.1109/12.544488
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