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Harvest Rate of Reconfigurable Pipelines
October 1996 (vol. 45 no. 10)
pp. 1200-1203

Abstract—For a reconfigurable architecture, the harvest rate is the expected percentage of defect-free processors that can be connected into the desired topology. In this paper, we give an analytical estimation for the harvest rate of reconfigurable multipipelines based on the following model: There are n pipelines each with m stages, where each stage of a pipeline is defective with identical independent probability 0.5 and spare wires are provided for reconfiguration. By formulating the "shifting" reconfiguration as weighted chains in a partial ordered set, we prove when n = Θ(m), the harvest rate is between 34% and 72%.

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Index Terms:
Harvest rate, yield, reconfigurable arrays, defect tolerance, pipelines, random graphs, percolation.
Citation:
Weiping Shi, Ming-Feng Chang, W. Kent Fuchs, "Harvest Rate of Reconfigurable Pipelines," IEEE Transactions on Computers, vol. 45, no. 10, pp. 1200-1203, Oct. 1996, doi:10.1109/12.543713
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