Issue No.10 - October (1996 vol.45)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.543708
<p><b>Abstract</b>—In this paper I present the theoretical aspects of a technique called transparent BIST for RAMs. This technique applies to any RAM test algorithm and transforms it into a transparent one. The interest of the transparent test algorithms is that testing preserves the contents of the RAM. The transparent test algorithm is then used to implement a transparent BIST. This kind of BIST is very suitable for periodic testing of RAMs. The theoretical analysis presented here shows that this transparent BIST technique does not decrease the fault coverage for modeled faults, it behaves better for unmodeled ones and does not increase the aliasing with respect to the initial test algorithm. Furthermore, transparent BIST involves only slightly higher area overhead with respect to standard BIST. Thus, transparent BIST becomes more attractive than standard BIST since it can be used for both fabrication testing and periodic testing.</p>
BIST, coupling faults, pattern sensitive faults, RAM test algorithms, signature analysis, transparent BIST.
Michael Nicolaidis, "Theory of Transparent BIST for RAMs", IEEE Transactions on Computers, vol.45, no. 10, pp. 1141-1156, October 1996, doi:10.1109/12.543708