Issue No.08 - August (1996 vol.45)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.536238
<p><b>Abstract</b>—We develop a formal and systematic methodology for designing an optimal multiple bus system (MBS) realizing a set of interconnection functions whose graphical representation (denoted as IFG) is symmetric. The problem of constructing an optimal MBS for a given IFG is NP-Hard. In this paper, we show that polynomial time solutions exist when the IFG is vertex symmetric. This is the case of interest for the vast majority of important interconnection function sets.</p><p>We present a particular partition (which can be found in polynomial time) on the edge set of a vertex symmetric IFG, that produces a symmetric MBS with minimum number of buses as well as minimum number of interfaces. We demonstrate several advantages of such an MBS over a direct-link architecture realizing the same IFG, in terms of the number of ports per processor, number of neighbors per processors, and the diameter.</p>
Bus minimization, Cayley color graph, interconnection function, interconnection network, interface minimization, multiple bus system, optimal design, SIMD operation.
Priyalal Kulasinghe, "Optimal Realization of Sets of Interconnection Functions on Synchronous Multiple Bus Systems", IEEE Transactions on Computers, vol.45, no. 8, pp. 964-969, August 1996, doi:10.1109/12.536238