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Amitava Majumdar, "On Evaluating and Optimizing Weights for Weighted Random Pattern Testing," IEEE Transactions on Computers, vol. 45, no. 8, pp. 904916, August, 1996.  
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@article{ 10.1109/12.536233, author = {Amitava Majumdar}, title = {On Evaluating and Optimizing Weights for Weighted Random Pattern Testing}, journal ={IEEE Transactions on Computers}, volume = {45}, number = {8}, issn = {00189340}, year = {1996}, pages = {904916}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.536233}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
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TY  JOUR JO  IEEE Transactions on Computers TI  On Evaluating and Optimizing Weights for Weighted Random Pattern Testing IS  8 SN  00189340 SP904 EP916 EPD  904916 A1  Amitava Majumdar, PY  1996 KW  Builtin selftest KW  weighted random pattern testing KW  heterogeneous urn sampling KW  waiting time distribution. VL  45 JA  IEEE Transactions on Computers ER   
Abstract—Two problems in weighted random pattern testing are considered: 1) evaluating a set of input weights in terms of the amount of time required to generate a set of test patterns and 2) determining the optimal weights for a given test set. An exact expression for expected test length is derived as a function of input weights. Upper and lower bounds for expected test length are presented. Percentage error of approximation is expressed in terms of the bounds. Based on these results, algorithms are given for approximating expected test length. These algorithms allow the user to tradeoff accuracy and computational complexity. Experiments with some test sets are presented to illustrate the accuracy of the approximation technique. Expected test length is shown to be a convex function of input weights. A simple hillclimbing algorithm is defined to find optimal weights for a given set of test patterns. When hardware constraints, limiting the number of weights to be realized for each input bit, are also specified, a simple modification of the algorithm suffices in yielding optimal weights in the constrained space. Experiments with several circuits yield of the order of 96% to 99% reduction in expected test length over that achieved by current techniques.
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