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A New Self-Routing Permutation Network
May 1996 (vol. 45 no. 5)
pp. 630-636

Abstract—In this paper, a self-routing permutation network based on a binary radix sorting network has been proposed. It has O(log2n) propagation delay and O(n log2n) hardware complexity with bit-parallel input. The hardware complexity can be reduced to O(n log n) with bit-serial input. The binary radix sorting network is recursively constructed by log n stages of bit sorting networks. The bit sorting network is then constructed by a proposed self-routing reverse banyan network. It has O(log n) propagation delay and O(n log n)hardware complexity. The proposed reverse banyan network has been fully verified by Verilog Hardware Description Language in logical level. The VLSI design of its switching elements is simple and regular.

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Index Terms:
Binary radix network, bit sorting network, compact routing, premutation network, reverse banyan network, self-routing.
Citation:
Wang-Jiunn Cheng, Wen-Tsuen Chen, "A New Self-Routing Permutation Network," IEEE Transactions on Computers, vol. 45, no. 5, pp. 630-636, May 1996, doi:10.1109/12.509917
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