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Arithmetic Unit Design for Neural Accelerators: Cost Performance Issues
October 1995 (vol. 44 no. 10)
pp. 1256-1260

Abstract—Arithmetic unit design is a key issue when supporting the computational requirements of neural networks. However, there is little quantitative evidence from the study of existing neural accelerators to help choose between arithmetic constructs. This paper presents an assessment of the cost-performance trade-offs between arithmetic constructs for linear neural accelerators.

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Index Terms:
Neural networks, linear array accelerators, arithmetic constructs, instruction set measurements, cost/performance trade-offs.
Citation:
S.r. Jones, K.m. Sammut, "Arithmetic Unit Design for Neural Accelerators: Cost Performance Issues," IEEE Transactions on Computers, vol. 44, no. 10, pp. 1256-1260, Oct. 1995, doi:10.1109/12.467702
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