This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Producing Reliable Initialization and Test of Sequential Circuits with Pseudorandom Vectors
October 1995 (vol. 44 no. 10)
pp. 1251-1256

Abstract—In this paper, the initialization of sequential circuits using pseudorandom input patterns is addressed. An extended Markov chain model that covers the initialization phase is proposed. This model support the theoretical framework used to demonstrate that sequential circuits can be initialized with pseudorandom vectors. This leads to a uniform BIST approach in which initialization and testing are performed together with a single pseudorandom generator.

[1] R.C. Bracken,M.M. Salatino,C.L. Adkins,, and B.P. Kraemer,“Multichip-modules: A comparative study: Phase 1. System design andsubstrate selection,” 1991 Univ./Government/Industry Microelectronics Symp.,Melbourne, Fla., June 1991.
[2] B. Konemann et al., “Built-in logic block observation techniques,” Int’l Test Conf., pp. 37-41, 1979.
[3] M. Abramovici et al., Digital System Testing and Testable Design, pp. 351-352.New York: Computer Science Press, 1990.
[4] C.-J. Lin,Y. Zorian,, and S. Bhawmik,“PSBIST: A partial scan based built-in self test scheme,” Proc. IEEE Int’l Test Conf., pp. 507-516, 1993.
[5] M. Youssef,Y. Savaria,, and B. Kaminska,“A methodology for efficiently inserting and condensing test points,” IEE Proc. E, vol. 140, no. 3, pp. 154-160, May 1993.
[6] F. Darlay,M. Soufi,Y. Savaria,, and B. Kaminska,“Pseudorandom vectors can achieve deterministic initialization,” Canadian Conf. VLSI, pp. 73-80, Halifax, Oct. 1992.
[7] N. Ben Hamida,B. Kaminska,, and Y. Savaria.,“Initiability: A measure of sequential testability,” Proc. Int’l Symp. Circuits and Systems, pp. 1,619-1,622,Chicago, 1993.
[8] M. Soufi,Y. Savaria,B. Kaminska,, and F. Darlay,Technical Report No. EPM-RT-94/23,École Polytechnique of Montréal, 1994
[9] L.H. Goldstein, Controllability/Observability Analysis of Digital Circuits IEEE Trans. Circuits and Systems, vol. 26, pp. 685-693, 1979.
[10] F. Brglez,D. Bryan,, and K. Kozminski,“Combinational profiles of sequential benchmark circuits,” Int’l Symp. Circuits and Systems’89, pp. 1,929-1,934.

Index Terms:
Built-in self-testing, full reset, partial reset, initialization of sequential circuits, pseudorandom testing, modelization of sequential circuits, Markov chain processes, testability measures.
Citation:
Y. Savaria, M. Soufi, F. Darlay, B. Kaminska, "Producing Reliable Initialization and Test of Sequential Circuits with Pseudorandom Vectors," IEEE Transactions on Computers, vol. 44, no. 10, pp. 1251-1256, Oct. 1995, doi:10.1109/12.467701
Usage of this product signifies your acceptance of the Terms of Use.