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Measuring Cache and TLB Performance and Their Effect on Benchmark Runtimes
October 1995 (vol. 44 no. 10)
pp. 1223-1235

Abstract—In previous research, we have developed and presented a model for measuring machines and analyzing programs, and for accurately predicting the running time of any analyzed program on any measured machine. That work is extended here by: 1) developing a high level program to measure the design and performance of the cache and TLB units; 2) using those measurements, along with published miss ratio data, to improve the accuracy of our runtime predictions; 3) using our analysis tools and measurements to study and compare the design of several machines, with particular reference to their cache and TLB performance. As part of this work, we describe the design and performance of the cache and TLB for ten machines. The work presented in this paper extends a powerful technique for the evaluation and analysis of both computer systems and their workloads; this methodology is valuable both to computer users and computer system designers.

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Index Terms:
Performance evaluation, execution time prediction, memory hierarchy, processor caches, table lookaside buffers.
Citation:
Alan Jay Smith, Rafael H. Saavedra, "Measuring Cache and TLB Performance and Their Effect on Benchmark Runtimes," IEEE Transactions on Computers, vol. 44, no. 10, pp. 1223-1235, Oct. 1995, doi:10.1109/12.467697
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