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IEEE Transactions on Computers
October 1995 (vol. 44 no. 10)
ISSN: 0018-9340
Table of Contents
Papers
Broadcast Ring Sandwich Networks
(Abstract)
Gerald M. Masson
Yuanyuan Yang
pp. 1169-1180
ABSTRACT
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Valved Routing: Efficient Flow Control for Adaptive Nonminimal Routing in Interconnection Networks
(Abstract)
Chung-Ta King
Wei-Kuo Liao
pp. 1181-1193
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Characterizing the Performance of Algorithms for Lock-Free Objects
(Abstract)
Theodore Johnson
pp. 1194-1207
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The Performance of Crossbar-Based Binary Hypercubes
(Abstract)
Bernard L. Menezes
Frank T. Hady
pp. 1208-1215
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Refinable Bounds for Large Markov Chains
(Abstract)
Pierre Semal
pp. 1216-1222
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Measuring Cache and TLB Performance and Their Effect on Benchmark Runtimes
(Abstract)
Alan Jay Smith
Rafael H. Saavedra
pp. 1223-1235
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Design and Performance Analysis of a Disk Array System
(Abstract)
Antonio Puliafito
Vincenzo Catania
Salvatore Riccobene
Lorenzo Vita
pp. 1236-1247
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Brief Contributions
On the Complexity of Optimal Bused Interconnections
(Abstract)
Ahmed El-Amawy
Priyalal Kulasinghe
pp. 1248-1251
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Producing Reliable Initialization and Test of Sequential Circuits with Pseudorandom Vectors
(Abstract)
Y. Savaria
M. Soufi
F. Darlay
B. Kaminska
pp. 1251-1256
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Arithmetic Unit Design for Neural Accelerators: Cost Performance Issues
(Abstract)
S.r. Jones
K.m. Sammut
pp. 1256-1260
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A Low-Cost High-Capacity Associative Memory Design Using Cellular Automata
(Abstract)
I. Sen Gupta
D. Roy Chowdhury
P. Pal Chaudhuri
pp. 1260-1264
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