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Francesco Piazza, Elio D. Di Claudio, Gianni Orlandi, "Fast Combinatorial RNS Processors for DSP Applications," IEEE Transactions on Computers, vol. 44, no. 5, pp. 624633, May, 1995.  
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@article{ 10.1109/12.381948, author = {Francesco Piazza and Elio D. Di Claudio and Gianni Orlandi}, title = {Fast Combinatorial RNS Processors for DSP Applications}, journal ={IEEE Transactions on Computers}, volume = {44}, number = {5}, issn = {00189340}, year = {1995}, pages = {624633}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.381948}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
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TY  JOUR JO  IEEE Transactions on Computers TI  Fast Combinatorial RNS Processors for DSP Applications IS  5 SN  00189340 SP624 EP633 EPD  624633 A1  Francesco Piazza, A1  Elio D. Di Claudio, A1  Gianni Orlandi, PY  1995 KW  Binary multipliers KW  digital signal processing KW  mixed radix arithmetic KW  parallel architectures KW  pseudoresidue KW  residue number system KW  systolic arrays KW  VLSI processors. VL  44 JA  IEEE Transactions on Computers ER   
[1] A. Peled and B. Liu, “A new hardware realization of digital filters,” IEEE Trans. Acoustic, Speech, and Signal Processing, vol. 22, pp. 456462, Dec. 1974.
[2] S. Nakamura and K.Y. Chu, "A Single Chip Parallel Multiplier by MOS Technology," IEEE Trans. Computers, vol. 37, no. 3, pp. 274282, Mar. 1988.
[3] B. Sinha and P. Srimani, “Fast Parallel Algorithms for Binary Multiplication and Their Implementation on Systolic Architectures,” IEEE Trans. Computers, vol. 38, no. 3, pp. 424431, Mar. 1989.
[4] N.S. Szabo and R.T. Tanaka,Residue Arithmetic and its Applications to Computer Technology.New York: McGrawHill, 1967.
[5] J.H. McClelland and C.M. Rader,Number Theory in Digital Signal Processing.Englewood Cliffs, N.J.: Prentice Hall, 1979.
[6] F.J. Taylor,“Residue arithmetic: A tutorial with examples,” IEEE Trans Computers, pp. 5062, May 1984.
[7] M.A. Soderstrand,W.K. Jenkins,G.A. Jullien,, and F.J. Taylor,Residue Number System Arithmetic: Modern Applicationsin Digital Signal Processing. IEEE Press, 1986.
[8] R. Krishnan,G.A. Jullien,, and C. Miller,“Complex digital signal processing using quadratic residue number systems,” IEEE Trans. Acoustic, Speech, and Signal Processing, vol. 34, no. 1, pp. 166177, Feb. 1986.
[9] J.J. Vaccaro,B.L. Johnson,, and C.L. Nowacky,“A systolic DFT using RNS over the ring of Gaussian integers,” Proc. IEEE Int’l Conf. Acoustic, Speech and Signal Processing, pp. 1,1571,160,Tokyo: 1986.
[10] E.D. DiClaudio,G. Orlandi,, and F. Piazza,“A systolic redundant residue arithmetic error correction circuit,” IEEE Trans. Computers, vol. 42, no. 4, pp. 427432, Apr. 1993.
[11] H.T. Kung,“Why systolic architectures?” Computer, vol. 15, pp. 1833, pp. 3746.
[12] S.Y. Kung,H.J. Whitehouse,, and T. Kailath, eds., , VLSI and Modern Signal Processing.Englewood Cliffs, N.J.: Prentice Hall, 1985.
[13] G.A. Jullien,“Residue number scaling and other operations using ROM arrays,” IEEE Trans. Computers, vol. 27, no. 4, pp. 325336, Apr. 1978.
[14] M. Taheri, G.A. Jullien, and W.C. Miller, "HighSpeed Signal Processing Using Systolic Arrays Over Finite Rings," IEEE J. Selected Areas of Comm., vol. 6, pp. 504512, Apr. 1988.
[15] G.A. Jullien and W.C. Miller, "Improved Cellular Structures for BitSteered ROM Finite Ring Systolic Arrays," Proc. IEEE Int'l Symp. Circuits and Systems, pp. 1,4151,417,New Orleans, May13, 1990.
[16] D. Radhakrishnan and Y. Yuan, “Novel Approaches to the Design of VLSI RNS Multipliers,” IEEE Trans. Circuits and SystemsII: Analog and Digital Signal Processing, vol. 39, pp. 5257, Jan. 1992.
[17] C.D. Walter, “Systolic Modular Multiplier,” IEEE Trans. Computers, vol. 42, no. 3, pp. 376378, Mar. 1993.
[18] S.J. Meehan, S.D. O'Neil, and J.J. Vaccaro, “A Universal Input and Output RNS Converter,” IEEE Trans. Circuits and Systems, vol. 37, no. 6, pp. 799803, June 1990.
[19] T. Stouraitis,“Efficient converters for residue and quadraticresidue number systems,” IEEE Proc., part G, pp. 626634, Dec. 1992.
[20] F.J. Taylor and A.S. Ramnarayanan, “An Efficient ResiduetoDecimal Converter,” IEEE Trans. Circuits and Systems, vol. 28, pp. 11641169, Dec. 1981.
[21] A. P. Shenoy and R. Kumaresan,“Fast base extension using a redundant modulus in RNS,”IEEE Trans. Comput., vol. 38, pp. 292–297, Feb. 1989.
[22] N.M. Wigley,G.A. Jullien,, and D. Reaume,“Large dynamic range computations over small finite rings,” IEEE Trans. Computers, vol. 43, no. 1, pp. 7886, Jan. 1994.
[23] P.L. Montgomery,“Modular multiplication without trial division,” Mathematics of Computation, vol. 44, no. 170, pp. 519521, Apr. 1985.
[24] H.J. Nussbaumer,Fast Fourier Transform and Convolution Algorithms.New York: Springer, 1981.
[25] R.E. Crochiere and L.R. Rabiner,Multirate Digital Signal Processing,Englewood Cliffs, N.J.: Prentice Hall, 1983.
[26] P.P. Vaidyanathan,“Multirate digital filters, filter banks, polyphase networks and applications,” Proc. IEEE, vol. 78, no. 1, pp. 5693, Jan. 1990.
[27] N. Takagi,“A radix4 modular multiplication hardware algorithm for modular exponentiation,” IEEE Trans. Computers, vol. 41, no. 8, pp. 949956, Aug. 1992.
[28] H. Orup and P. Kornerup,“A highradix hardware algorithm for calculating the exponential MEmodulo N,” Proc. IEEE 10th Symp. Computers, Arithmetic, pp. 5156, June 1991.
[29] G. Alia and E. Martinelli, “A VLSI Modulo m Multiplier,” IEEE Trans. Computers, vol. 40, no. 7, pp. 873878, July 1991.
[30] V. Paliouras,D. Soudris,, and T. Stouraitis,“Systematic derivation of the processing element of a systolic array based on residue numbersystem,” Proc. IEEE Int’l Symp. on Circuit and System, pp. 815818,San Diego, Calif. 1992.
[31] Z.J. Mou and F. Jutand, “OverturnedStairs Adder Trees and Multiplier Design,” IEEE Trans. Computers, vol. 41, no. 8, pp. 940948, Aug. 1992.
[32] T. Lynch and E.E. Swartzlander, "A Spanning Tree Carry Lookahead Adder," IEEE Trans. Computers, vol. 41, no. 8, pp. 931939, Aug. 1992.