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Issue No.03 - March (1995 vol.44)
pp: 371-382
ABSTRACT
<p><it>Abstract</it>—This paper reports a novel approach for designing byte error-correcting codes using <it>cellular automata</it> (CA). A simple scheme for generation and decoding of single-byte error-correcting and double-byte error-detecting codes, referred to as CA-SbEC-DbED, is presented. Extension of the scheme to locate/correct larger number of information byte errors has been also included. The encoding and decoding algorithms have been designed with the help of a linear operator that can be conveniently realized with a maximum length group CA. The regular, modular and cascadable structure of CA can be economically built with VLSI technology. Compared to the existing architecture of the Reed-Solomon decoder chip, CA-based implementation of the proposed decoding scheme provides a simple cost effective solution.</p>
INDEX TERMS
Cellular automata, error-correcting code, fault tolerance, signature analysis.
CITATION
Indranil Sen Gupta, Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri, "CA-Based Byte Error-Correcting Code", IEEE Transactions on Computers, vol.44, no. 3, pp. 371-382, March 1995, doi:10.1109/12.372030
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