This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Hierarchical Classification of Permutation Classes in Multistage Interconnection Networks
December 1994 (vol. 43 no. 12)
pp. 1439-1444

This paper explores a new hierarchy among different permutation classes, that has many applications in multistage interconnection networks. The well-known LC (linear-complement) class is shown to be merely a subset of the closure set of the BP (bit-permute) class, known as the BPCL (bit-permute-closure) class; the closure is obtained by applying certain group-transformation rules on the BP-permutations. It indicates that for every permutation P of the LC class, there exists a permutation PI in the BP class, such that the conflict graphs of P and P* are isomorphic, for n-stage MIN's. This obviates the practice of treating the LC class as a special case; the existing algorithm for optimal routing of BPC class in an n-stage MIN can take care of optimal routing of the LC class as well. Finally, the relationships of BPCL with other classes of permutations, e.g., LIE (linear-input-equivalence), BPIE (bit-permute-input-equivalence), BPOE (bit-permute-output-equivalence) are also exposed. Apart from lending better understanding and an integral view of the universe of permutations, these results are found to be useful in accelerating routability in n-stage MIN's as well as in (2n-1)-stage Benes and shuffle-exchange networks.

[1] T. Feng, "A survey of interconnection networks,"Computer, vol. 14, pp. 12-27, Dec. 1981.
[2] C. L. Wu and T. Feng, "On a class of multistage interconnection networks,"IEEE Trans. Comput., vol. C-29, pp. 694-702, Aug. 1980.
[3] H. J. Siegel, "A model of SIMD machines and a comparison of various interconnection networks,"IEEE Trans. Comput., vol. C-28, pp. 907-917, Dec. 1978.
[4] D. K. Pradhan and K. L. Kodandapani, "A uniform representation of single and multistage interconnection networks used in SIMD machines,"IEEE Trans. Comput., vol. C-29, pp. 777-790, Sept. 1980.
[5] D. P. Agrawal, "Graph theoretical analysis and design of multistage interconnection networks,"IEEE Trans. Comput., vol. C-32, pp. 637-648, July 1983.
[6] S.-T. Huang and S. K. Tripathi, "Finite state model and compatibility theory: New analysis tools for permutation networks,"IEEE Trans. Comput., vol. C-35, no. 7, pp. 591-601, July 1986.
[7] T. H. Szymanski and V. C. Hamacher, "On the permutation capability of multistage interconnection networks,"IEEE Trans. Comput., vol. C-36, pp. 810-822, July 1987.
[8] C. S. Raghavendra and A. Varma, "Fault-tolerant multiprocessors with redundant path interconnection network,"IEEE Trans. Comput., vol. C-35, no. 4, pp. 307-316, Apr. 1986.
[9] P. J. Bernherd and D. J. Rosenkrantz, "The complexity of routing through an omega network," inProc. 25th Annu. Allerton Conf. Commun., Contr. and Computing, Sept. 1987.
[10] J. S. Deogun and Z. Fang, "A heuristic algorithm for conflict resolution problem in multistage interconnection networks," inProc. 1988 Int. Conf. on Parallel Processing, Aug. 1988, pp. 475-478.
[11] N. Das, B. B. Bhattacharya, and J. Dattagupta, "Isomorphism of conflict graphs in multistage interconnection networks and its application to optimal routing,"IEEE Trans. Comput., vol. 42, pp. 665-667.
[12] M. C. Pease, "The indirect binaryn-cube microprocessor array,"IEEE Trans. Comput., vol. C-26, pp. 458-473, May 1977.
[13] T. Etzion and A. Lempel, "An efficient algorithm for generating linear transformations in a shuffle-exchange network,"SIAM J. Comput., vol. 15, no. 1, pp. 216-221, Feb. 1986.
[14] S. T. Huang, S. K. Tripathi, N. S. Chen, and Y. C. Tseng, "An efficient routing algorithm for realizing linear permutations onptshuffle-exchange networks,"IEEE Trans. Comput., vol. 40, pp. 1292-1298, Nov. 1991.
[15] C. S. Raghavendra and R. V. Boppana, "On self-routing in Benes and shuffle-exchange networks,"IEEE Trans. Comput., vol. 40, pp. 1057-1064, Sept. 1991.
[16] N. Das, K. Mukhopadhyaya, and J. Dattagupta, "On self-routable permutations in Benes network," inProc. 1991 Int. Conf. Parallel Processing, Aug. 1991, pp. 1270-1273.
[17] J. Keohane and R. E. Stearns, "Routing linear permutations through the omega network in two passes,"Proc. 2nd Symp. Frontiers of Massively Parallel Computing, 1988, pp. 476-482.
[18] P. C. Yew and D. H. Lawrie, "An easily controlled network for frequently used permutations."IEEE Trans. Comput., vol. C-30, pp. 296-298, Apr. 1981.
[19] N. Das, "Permutation capabilities, routing and fault- tolerance in some multistage interconnection networks," Ph.D. thesis, Dept. of Comput. Sci. and Eng., Jadavpur Univ., Calcutta, India, 1992.

Index Terms:
multistage interconnection networks; hierarchical classification; permutation classes; multistage interconnection networks; linear-complement class; bit-permute class; bit-permute-closure; shuffle-exchange networks; Benes networks.
Citation:
N. Das, B.B. Bhattacharya, J. Dattagupta, "Hierarchical Classification of Permutation Classes in Multistage Interconnection Networks," IEEE Transactions on Computers, vol. 43, no. 12, pp. 1439-1444, Dec. 1994, doi:10.1109/12.338106
Usage of this product signifies your acceptance of the Terms of Use.