This Article 
 Bibliographic References 
 Add to: 
Unified Architecture for Divide and Conquer Based Tridiagonal System Solvers
December 1994 (vol. 43 no. 12)
pp. 1413-1425

The solution of tridiagonal systems is a topic of great interest in many areas of numerical analysis. Several algorithms have recently been proposed for solving triadiagonal systems based on the Divide and Conquer (DC) strategy. In this work we propose a unified parallel architecture for DC algorithms which present the data flows of the Successive Doubling, Recursive Doubling and Parallel Cyclic Reduction methods. The architecture is based in the perfect unshuffle permutation, which transforms these data flows into a constant geometry one. The partition of the data arises in a natural manner, giving way to a systolic data flow with a wired control section. We conclude that the constant geometry Cyclic Reduction architecture is the most appropriate one for solving tridiagonal systems and, from the point of view of integration in VLSI technology, is the one which uses the least amount of area and the smallest number of pins.

[1] R. F. Boisvert, "Algorithms for special tridiagonal systems,"SIAM J. Scientific Statist. Computat., vol. 12, no. 2, pp. 423-442, 1991.
[2] S. Bondeli, "Divide and conquer: A parallel algorithm for the solution of a tridiagonal linear system of equations,"Parallel Computing, vol. 17, no. 4-5, pp. 419-434, 1991.
[3] L. Brugnano, "A parallel solver for tridiagonal linear systems for distributed memory parallel computers,"Parallel Computing, vol. 17, no. 9, pp. 1017-1023, 1991.
[4] C. L. Cox and J. A. Knisely, "A tridiagonal system solver for distributed memory parallel processors with vector nodes,"J. Parallel Distrib. Computing, vol. 13, pp, 325-331, 1991.
[5] O. Egecioglu, C. K. Koc and A. J. Laub, "A recursive doubling algorithm for solution of tridiagonal systems on hypercube multiprocessors,"J. Computat. Appl. Math., vol. 27, pp. 95-108, 1989.
[6] D. J. Evans, "Parallel algorithms in numerical linear algebra," Internal Rep., Loughborough Univ. of Technol., 1992.
[7] R. W. Hockney and C. R. Jesshope,Parallel Computers. Philadelphia, PA: Adam Hilger, 1988.
[8] A. Krechel, H. J. Plum, and K. Stuben, "Parallelization and vectorization aspects of the solution of tridiagonal linear systems,"Parallel Computing, vol. 14, no. 1. pp. 31-49, 1990.
[9] S. L. Johnson, "Solving tridiagonal systems on ensemble architectures,"SIAM J. Sci. Stat. Comput., vol. 8, pp. 345-392, 1987.
[10] F. C. Lin and K. L. Chung, "A cost-optimal parallel tridiagonal solver,"Parallel Computing, vol. 15, no. 1-3, pp. 189-199, 1990.
[11] Z. G. Mou and P. Hudak, "An algebraic model for divide and conquer and its parallelism,"J. Supercomputing, vol. 2, no. 2, pp. 257-278, 1988.
[12] S. M. Müller and D. Scheerer, "A method to parallelize tridiagonal solvers,"Parallel Computing, vol. 17, no. 2-3, pp. 181-188, 1991.
[13] M. C. Pease, "An adaptation of the fast Fourier transform for parallel processing,"J. ACM, vol. 15, pp. 252-264, 1968.
[14] F. Reale, "A tridiagonal solver for massively parallel computer systems,"Parallel Computing, vol. 16, pp. 361-368, 1990.
[15] G. Spaletta and D. J. Evans, "The parallel recursive decoupling algorithm for solving tridiagonal linear systems,"Parallel Computing, no. 19, pp. 563-576, 1993.
[16] H. S. Stone, "An efficient parallel algorithm for the solution of a tridiagonal linear system of equations,"J. ACM, vol. 20, no. 1, pp. 27-38, Jan. 1973.
[17] X. S. Sun, H. Zhang, and L. M. Ni, "Efficient tridiagonal solvers on multicomputers,"IEEE Trans. Comput., vol. 41, no. 3, pp. 286-296, Mar. 1992.
[18] X. Wang and Z. G. Mou, "A divide and conquer method of solving tridiagonal systems on hypercubes masssively parallel computers,"IEEE Conf. Distrib. Syst., 1991, pp. 810-817.
[19] E. Wold and A. M. Despain, "Pipeline and parallel pipeline FFT processors for VLSI implementations,"IEEE Trans. Comput., vol. C-33, no. 5, pp. 414-426, 1984.
[20] E. L. Zapata and F. Argüello, "A VLSI constant geometry architecture for the Fast Hartley and Fourier Transforms,"IEEE Trans. Parallel Distrib. Syst., vol. 3, no. 1, pp. 50-70, 1992.
[21] E. L. Zapata and F. Argüello, "Aplication-specific architecture for fast transforms based on the successive doubling method,"IEEE Trans. Signal Processing, vol. 41, no. 3, pp. 1476-1481, 1993.

Index Terms:
parallel architectures; divide and conquer methods; unified architecture; divide and conquer based tridiagonal system solvers; unified parallel architecture; Successive Doubling; Recursive Doubling; Parallel Cyclic Reduction methods; systolic data flow; wired control section; constant geometry cyclic reduction architecture; VLSI.
J. Lopez, E.L. Zapata, "Unified Architecture for Divide and Conquer Based Tridiagonal System Solvers," IEEE Transactions on Computers, vol. 43, no. 12, pp. 1413-1425, Dec. 1994, doi:10.1109/12.338101
Usage of this product signifies your acceptance of the Terms of Use.