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A Parallel Virtual Machine for Programs Composed of Abstract Data Types
November 1994 (vol. 43 no. 11)
pp. 1249-1261

An abstract data type mechanism is provided by many modern programming languages, and is often employed during system development to promote modularity and reuse. This paper describes ARC, a parallel virtual machine designed for executing programs that use abstract data types (ADTs). The major contribution of ARC is that it supports Asynchronous Remote Procedure Call (ARPC), a model of parallel execution that works well for programs developed by layering ADTs. To support ARPC, ARC performs data synchronization, automatic parameter restoration, and dynamic load balancing.

[1] G. Booch,Software Components with Ada. Menlo Park, CA: Benjamin/Prentice-Hall, 1987.
[2] A. A. Chien and W. J. Dally, "Concurrent aggregates (CA)," inProc. Second Annu. Symp. Principles and Practices of Parallel Programming, ACM, Mar. 1990, pp. 187-196.
[3] P. Chow and M. Horowitz, "Architectureal trade-offs in the design of MIPS-X," inProc. 14th Int. Symp. Comput. Architecture, June 1987, pp. 300-308.
[4] W. J. Dally, "Fine-grain message passing concurrent computers," inProc. Third Conf. Hypercube Concurrent Comput., vol. 1, Pasadena, CA, pp. 2-12, Jan. 1988.
[5] W. J. Dally, L. Chao, and A. Chien et al., "Architecture of a message-driven processor," inProc. 14th Annu. Symp. Comput. Architecture, ACM, June 1987, pp. 189-196.
[6] C. N. Fischer and R. J. LeBlanc,Crafting a Compiler. Menlo Park, CA: Benjamin-Cummings, 1988.
[7] L. Foti, D. English, and R. P. Hopkins, "Reduced-instruction set multimicrocomputer system," inProc. AFIPS Nat. Conf., July 1984, pp. 69-76.
[8] W. K. Giloi and R. Gueth, "Concepts and realization of a high-performance data type architecture,"Int. J. Comput. and Inform. Sci., vol. 11, no. 1, pp. 25-54, Feb. 1982.
[9] A. Grimshaw, "The mentat run-time system: Support for medium grain parallel computing," inProc. Fifth Distribut. Memory Computing Conf., IEEE, Apr. 1990, pp. 1064-1073.
[10] D. Harms and B. W. Weide, "Copying and swapping: Influences on the design of reusable software components,"IEEE Trans. Software Eng., vol. 17, no. 5, pp. 424-435, May 1991.
[11] J. E. Hoilingsworth, "Software Component Design for reuse: A language-independent discipline applied to Ada," Ph.D. thesis, Ohio State Univ., 1992.
[12] A. Khanna, "On managing classes in a distributed object-oriented operating system," inProc. Fifth Distrib. Memory Computing Conf., IEEE, Apr. 1990, pp. 1056-1063.
[13] G. Krasner, "The smalltalk-80 virtual machine,"BYTE, pp. 300-320, Aug. 1981.
[14] J. T. Kuehn and B. J. Smith, "The Horizon supercomputing system: Architecture and software," inSuper Computing'88, IEEE, Nov. 1988, pp. 28-34.
[15] B. Liskovet al., "Abstraction mechanisms in CLU,"Commun. ACM, vol. 20, pp. 564-576, Aug. 1977.
[16] B. Liskov and L. Shrira, "Promises: Linguistic support for efficient asynchronous procedure calls in distributed systems," inProc. SIGPLAN'88 Conf. Programming Language Design and Implementation, ACM, June 1988, pp. 260-267.
[17] A. Lunde, "Empirical evaluation of some features of instruction set processor architectures,"Commun. ACM, vol. 20, no. 3, pp. 143-153, Mar. 1977.
[18] S. Muralidharan and B. W. Weide, "On distributing programs built from reusable software components," Tech. Rep. OSU-CSIRC-TR-11/88-36, Ohio State Univ., Nov. 1988.
[19] National Semiconductor,The NS32000 Manual.
[20] R. Ohran, "Lilith and Modula-2,"BYTE, pp. 181-192, Aug. 1984.
[21] D. A. Padua and M. J. Wolfe, "Advanced compiler optimizations for supercomputers,"Common. ACM, vol. 29, no. 12, pp. 1184- 1201, Dec. 1986.
[22] G. M. Papadopoulos, "The Monsoon Dataflow Architecture," Ph.D. thesis, Massachusetts Inst. of Technol., Cambridge, MA, Aug. 1988.
[23] Parnas, D.L. 1972. On the Criteria to be Used in Decomposing Systems into Modules,Communications of the ACM, Vol.15, pp. 1053-1058.
[24] M. D. Hill, S. J. Eggers, J. R. Larus, G. S. Taylor, G. Adams, B. K. Bose, G.A. Gibson, P. M. Hansen, J. Keller, S. I. Kong, C. G. Lee, D. Lee, J. M. Pendleton, S.A. Ritchie, D. A. Wood, B. G. Zom, P. N. Hilfinger, D. Hodges, R. H. Katz, J. Ousterhout, and D.A. Patterson, "SPUR: A VLSI multiprocessor workstation,"IEEE Comput. Mag., vol. 19, pp. 8-22, Nov. 1986.
[25] D. A. Patterson, "Reduced instruction set computers,"Commun. ACM, vol. 28, pp. 8-21, Jan. 1985.
[26] D. A. Patterson and C. Sequin, "A VLSI RISC,"Computer, vol. 15, no. 9, pp. 8-21, Sept. 1982.
[27] S. A. Przybylski, T. R. Gross, J. L. Hennessey, N. P. Jouppi, and C. Rowen, "Organization and VLSI implementation of MIPS,"J. VLSI and Comput. Syst., vol. 1, no. 2, pp. 170-208, Dec. 1984.
[28] G. Radin, "The 801 minicomputer,"IBM J. Res. and Develop., vol. 27, no. 3, pp. 237-246, May 1983.
[29] M. Sitaraman, L. R. Welch, and D. E. Harms, "On specification of reusable software components,"The Int. J. Software Eng. and Knowledge Eng., vol. 3, no. 2, pp. 207-229, 1993.
[30] J. E. Smith, "Dynamic instruction scheduling and the astronautics ZS-1,"Computer, vol. 22, no. 7, pp. 21-35, July 1989.
[31] P. Steenkiste and J. Hennessy, "Lisp on a reduced instruction set processor: Characterization and organization,"Computer, vol. 21, no. 7, pp. 34-45, July 1988.
[32] A. D. Stoyenko, L. R. Welch, and B. C. Cheng, "Response time prediction in object-based, parallel embedded systems,"Microprocessing and Microprogramming, vol. 40, pp. 135-150, 1994.
[33] A. D. Stoyenko, V. C. Hamacher, and R. C. Hold, "Analyzing hard-real-time programs for guaranteed schedulability,"IEEE Trans. Software Eng., vol. 17, no. 8, pp. 737-750, Aug. 1991.
[34] A. S. Tanenbaum, "Implications of structured programming for machine architecture,"Commun. ACM, vol. 21, no. 3, pp. 237-246, Mar. 1978.
[35] K. Toda, K. Nishida, S. Sakai, and T. Shimida, "A priority forwarding scheme for real-time multistage interconnection networks," inProc. Real-Time Syst. Symp., IEEE, Dec. 1992, pp. 208-217.
[36] R. M. Tomasulo, "An efficient algorithm for exploiting multiple arithmetic units,"IBM J. Res. and Develop., vol. 11, pp. 297-306, Jan. 1967.
[37] D. Ungar, R. Blau, P. Foley, D. Samples, and D. Patterson, "Architecture of SOAR: Smalltalk on RISC," inProc. 11th Annu. Symp. Comput. Architecture, ACM, June 1984, pp. 188-197.
[38] A. M. van Tilborg, "Panel on future directions in parallel computer architecture,"Comput. Architecture News, vol. 17, no. 4, pp. 3-53, June 1989.
[39] B. W. Weide, W.F. Ogden, and S.H. Zweben, "Reusable software components," inAdvances in Computers, vol. 33, M.C. Yovits, Ed. New York: Academic, 1991, to be published.
[40] L. R. Welch, "Architectural support for, and parallel execution of, programs constructed from reusable software components," Ph.D. thesis, Ohio State Univ., Dec. 1990.
[41] L. R. Welch and A. D. Stoyenko, "A multicomputer for real-time software constructed from reusable components," inReal-Time Syst. Symp. Workshop on Architectural Aspects of Real-Time Syst., IEEE, Dec. 1991, pp. 17-21.
[42] L. R. Welch, "Architectural support for dynamic data distribution and dynamic scheduling," inSixth Distribut. Memory Computing Conf., IEEE, Apr. 1991, pp. 83-89.
[43] L. R. Welch, "Assignment of ADT modules to processors," inInt. Parallel Processing Symp., IEEE, Mar. 1992, pp. 72-75.
[44] L. R. Welch, "Cloning ADT modules to increase parallelism: Rationale and techniques," Presented at theIEEE Int. Symp. Parallel and Distrib. Processing, Dec. 1993.
[45] L. R. Welch, A. D. Stoyenko, and S. Chen, "Assignment of ADT modules with random neural networks," inHawaii Int. Conf. System Sci., IEEE, Jan. 1993, pp. 546-555.
[46] N. Wirth, "Microprocessor architectures: A comparison based on code generation by compiler,"CACM, vol. 29, no. 10, pp. 978-990, Oct. 1986.
[47] N. Wirth, "Hardware Architectures for Programming Languages and Programming Languages for Hardware Architectures,"Proc. Architectural Support for Programming Languages and Operating Systems II, CS Press, Los Alamitos, Calif., Order No. 853, 1987, pp. 2-8.
[48] W. A. Wulf, "Compilers and computer architecture,"Computer, vol. 14, no. 7, pp. 41-47, July 1981.

Index Terms:
software reusability; virtual machines; parallel programming; abstract data types; data structures; database management systems; multiprocessing programs; remote procedure calls; parallel virtual machine; abstract data types; programming languages; system development; modularity; reuse; ARC; ADTs; Asynchronous Remote Procedure Call; data synchronization; automatic parameter restoration; dynamic load balancing.
L.R. Welch, "A Parallel Virtual Machine for Programs Composed of Abstract Data Types," IEEE Transactions on Computers, vol. 43, no. 11, pp. 1249-1261, Nov. 1994, doi:10.1109/12.324558
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