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Reliable Butterfly Distributed-Memory Multiprocessors
September 1994 (vol. 43 no. 9)
pp. 1004-1013

Since the butterfly network possesses various attractive topological properties and its constituent node has a fixed degree, independent of the system size, interconnecting processors in accordance with the butterfly topology to construct a distributed-memory multiprocessor is advantageous, especially for a large sized system. Every butterfly node in a multiprocessor so constructed is a processor, not simply a switch. In this paper, we examine a reliable butterfly-based multiprocessor that preserves its full rigid butterfly configuration even in the presence of faults. The proposed butterfly parallel system can tolerate any single and many multiple node/link failures, giving rise to significantly improved reliability. Reconfiguration in response to an operational fault in our design is easy and may be performed in a distributed manner. A system after reconfiguration is ensured to provide the same high performance. Reliability results show that our design compares favorably with an earlier design. An extension to this reliable design is also addressed.

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Index Terms:
network topology; fault tolerant computing; reliability; distributed memory systems; reconfigurable architectures; parallel architectures; multiprocessor interconnection networks; distributed-memory multiprocessors; reliability; butterfly network; topological properties; processor interconnection; operational faults; parallel system; node failures; link failures; reconfiguration; performance; design.
Nian-Feng Tzeng, "Reliable Butterfly Distributed-Memory Multiprocessors," IEEE Transactions on Computers, vol. 43, no. 9, pp. 1004-1013, Sept. 1994, doi:10.1109/12.312111
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