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On Circuits and Numbers
August 1994 (vol. 43 no. 8)
pp. 868-879

We establish new, yet intimate relationships between the 2-adic integers /sub 2/Z from arithmetics and digital circuits, both finite and infinite, from electronics. 1) Rational numbers with an odd denominator correspond to output only synchronous circuits. 2) Bit-wise 2-adic mappings correspond to combinational circuits. 3) Online functions /spl forall/n/spl isin/N,x/spl isinsub 2/Z:f(x)=f(xmodd2/sup n/)mod2/sup n/), correspond to synchronous circuits. 3) Continuous functions, /sub 2/Z/spl rarrsub 2/Z, correspond to circuits with output enable. The proof is obtained by constructing synchronous decision diagrams SDDs. They generalize to sequential circuits as classical BDD constructs do for combinational circuits. From simple identities over /sub 2/Z, we derive both classical and new bit-serial circuits for computing: {+,-,/spl times/,1/(1-2x), (1+8x)}. The correctness of each circuit directly follows from the 2-adic definition of the corresponding operator. All but the adders (+,-) above are infinite. Yet the use of reset signals reduces all previously infinite operators to finite circuits. The present work lays out the semantic basis of a new language for describing synchronous circuits. Language 2Z incorporates arithmetic synthesis for some of the above bit-serial operators, and for periodic binary constants (logic from chronograms). It also provides for the powerful deeply binding synchronous enable and reset operators, whose meaning is discussed.

[1] Y. Amice,Les nombres p-adiques, inPresses Universitaires de France, 1975.
[2] S. B. Akers, "Binary decision diagrams," inIEEE Trans. Comput., vol. 27, pp. 509-516, 1978.
[3] P. Bertin, D. Roncin, and J. Vuillemin, "Introduction to Programmable Active Memories," inSystolic Array Processors, J. McCanny, J. McWhirter, and E. Swartzlander, Eds., Prentice Hall, New York, 1989, pp. 300-309.
[4] P. Bertin, D. Roncin, and J. Vuillemin, "Programmable active memories: A performance assessment," inSymp. Integrated Syst., Seattle, WA: MIT Press, March 1993. Also available as PRL Rep. 24, Digital Equipment Corp., Paris Res. Lab., 85, Av. Victor Hugo, 92563 Rueil-Malmaison Cedex, France, 1993.
[5] G. Berry, "A hardware implementation of pure esterel," inAcademy Proc. Eng. Sci., Indian Academy of Sci., Sadhana, vol. 17, no. 1, 1992, pp. 95-130. Also available as PRL Rep. 15, Digital Equipment Corp., Paris Res. Laboratory, 85, Av. Victor Hugo, 92563 Rueil-Malmaison Cedex, France, 1989.
[6] J. P. Billon, "Perfect normal forms for discrete function," Bull Res. Rep., 87019, 1987.
[7] F. Bourdoncle, J. Vuillemin, and G. Berry. " The 2Z reference manual," PRL Rep. 50, Digital Equipment Corp., Paris Res. Lab., 85, Av. Victor Hugo, 92563 Rueil-Malmaison Cedex, France, 1994.
[8] R. E. Bryant, "Graph-based algorithms for Boolean function manipulation,"IEEE Trans. Comput., vol. C-35, no. 8, pp. 677-691, Aug. 1986.
[9] I. N. Chen and R. Willoner, "AnO(n)parallel multiplier with bit-sequential input and output," inIEEE Trans. Comput., vol. C-28, no. 10, Oct. 1979.
[10] K. Hensel, "Zahlentheorie," inGoshen., Berlin: Leiptzig, 1913.
[11] N. Koblitz,p-adic Numbers, p-adic Analysis and Zeta Functions. New York: Springer-Verlag, 1977.
[12] D. E. Knuth,The Art of Computer Programming, Vol. 2, Seminumerical Algorithms. Reading, MA: Addison-Wesley, 1981.
[13] F. T. Leighton,Introduction to Parallel Algorithms and Architectures: Arrays, Trees, and Hypercubes. Palo Alto, CA: Morgan Kaufmann, 1992.
[14] C. Leisersen and J. Saxe, "Retiming synchronous circuitry," inAlgorithmica, vol. 6, no. 1, pp. 5-35, 1991.
[15] R. F. Lyon, "Two's complement pipeline multipliers,"IEEE Trans. Commun., vol. COM-24, no. 4, pp. 418-425, Apr. 1976.
[16] C. A. Mead,Analog VLSI and Neural Systems. Reading, MA: Addison-Wesley, 1989.
[17] M. Shand and J. Vuillemin, "Fast implementations of RSA cryptography," presented at the11th IEEE Symp. Comput. Arithmetic, 1993.
[18] J. Vuillemin, "A very fast multiplication algorithm for VLSI implementation," inINTEGRATION, the VLSI J., vol. 1, no. 1, Mar. 1983.

Index Terms:
PROM; specification languages; combinatorial circuits; sequential circuits; digital arithmetic; logic CAD; 2-adic integers; arithmetic; digital circuits; rational numbers; synchronous circuits; combinational circuits; continuous functions; synchronous decision diagrams; BDD constructs; bit-serial circuits; adders; reset signals; 2Z; arithmetic synthesis f; periodic binary constants; deeply binding synchronous enable; combinational circuit semantics; arbitrary precision; programmable active memories.
Citation:
J.E. Vuillemin, "On Circuits and Numbers," IEEE Transactions on Computers, vol. 43, no. 8, pp. 868-879, Aug. 1994, doi:10.1109/12.295849
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