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Issue No.05 - May (1994 vol.43)
pp: 618-622
ABSTRACT
<p>Many current graphical display systems are based around a memory array commonly known as a frame buffer. In these systems, the frame buffer contains the array of pixels currently being displayed. Updates to the display are accomplished by modifying the values in the frame buffer. The author demonstrates how the performance of frame buffer based systems can be improved by decreasing the number of accesses to the frame buffer memory array. The proposed architecture, referred to as a multiaccess frame buffer, allows parallel access to constant area rectangles of the array of pixels stored in the frame buffer rather than the row oriented accesses required by most current frame buffer architectures. By allowing more general types of access, a given update can be performed with fewer frame buffer accesses.</p>
INDEX TERMS
buffer storage; parallel architectures; memory architecture; computer graphic equipment; computer graphics; multiaccess; frame buffer architecture; graphical display systems; memory array; frame buffer based systems; architecture; multiaccess frame buffer; parallel access; constant area rectangles; frame buffers; parallel memory architecture; computer graphics; interleaved memories; computer architecture.
CITATION
D.T. Harper, III, "A Multiaccess Frame Buffer Architecture", IEEE Transactions on Computers, vol.43, no. 5, pp. 618-622, May 1994, doi:10.1109/12.280810
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