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Issue No.05 - May (1994 vol.43)
pp: 560-568
ABSTRACT
<p>A linear feedback shift register, or LFSR, can implement an event counter by shifting whenever an event occurs. A single two-input exclusive-OR gate is often the only additional hardware necessary to allow a shift register to generate, by successive shifts, all of its possible nonzero values. The counting application requires that the number of shifts be recoverable from the LFSR contents so that further processing and analysis may be done. Recovering this number from the shift register value corresponds to a problem from number theory and cryptography known as the discrete logarithm. For some sizes of shift register, the maximal-length LFSR implementation requires more than a single gate, and for some, the discrete logarithm calculation is hard. The paper proposes for such size the use of certain one-gate LFSR's whose sequence lengths are nearly maximal, and which support easy discrete logarithms. These LFSR's have a concise mathematical characterization, and are quite common. The paper concludes by describing an application of these ideas in a computer hardware monitor, and by presenting a table that describes efficient LFSR's of size up to 64 bits.</p>
INDEX TERMS
binary sequences; shift registers; shift register sequences; linear feedback shift register; LFSR; event counter; discrete logarithms; LFSR contents; shift register; number theory; cryptography; discrete logarithm; sequence lengths; cyclic group; counter; hardware monitor; primitive polynomial; reducible polynomial; trinomial.
CITATION
D.W. Clark, Lih-Jyh Weng, "Maximal and Near-Maximal Shift Register Sequences: Efficient Event Counters and Easy Discrete Logarithms", IEEE Transactions on Computers, vol.43, no. 5, pp. 560-568, May 1994, doi:10.1109/12.280803
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