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JienChung Lo, "Reliable FloatingPoint Arithmetic Algorithms for ErrorCoded Operands," IEEE Transactions on Computers, vol. 43, no. 4, pp. 400412, April, 1994.  
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@article{ 10.1109/12.278479, author = {JienChung Lo}, title = {Reliable FloatingPoint Arithmetic Algorithms for ErrorCoded Operands}, journal ={IEEE Transactions on Computers}, volume = {43}, number = {4}, issn = {00189340}, year = {1994}, pages = {400412}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.278479}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  Reliable FloatingPoint Arithmetic Algorithms for ErrorCoded Operands IS  4 SN  00189340 SP400 EP412 EPD  400412 A1  JienChung Lo, PY  1994 KW  redundancy; digital arithmetic; error correction codes; floatingpoint arithmetic; errorcoded operands; highdensity VLSI; softerrors; residue encoded; Berger encoded; reliable floatingpoint multiplication; redundancy ratios; hardware redundancy; Berger check prediction; computer arithmetic; concurrent error detection; standard IEEE floatingpoint numbers KW  ; lowcost residue codes. VL  43 JA  IEEE Transactions on Computers ER   
Reliable floatingpoint arithmetic is vital for dependable computing systems. It is also important for future highdensity VLSI realizations that are vulnerable to softerrors. However, the direct checking of floatingpoint arithmetic is still an open problem. The author presents a set of reliable floatingpoint arithmetic algorithms for lowcost residue encoded and Berger encoded operands, respectively. Closed form equations are derived for floatingpoint addition, subtraction, multiplication, and division. Given the standard IEEE floatingpoint numbers, the proposed reliable floatingpoint multiplication algorithms for lowcost residue encoded operands are extremely lowcost: it requires less than 8% of hardware redundancy in all cases. For reliable floatingpoint addition and subtraction, the author finds the hardware redundancy ratios of applying lowcost residue code is about the same as that of applying Berger code: less than 40% of hardware redundancy for single precision numbers and about 16% for double precision numbers. For reliable floatingpoint division, Berger encoded operands yields hardware costeffectiveness: about 45% for single precision numbers and about 36% for double precision numbers.
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