
This Article  
 
Share  
Bibliographic References  
Add to:  
Digg Furl Spurl Blink Simpy Del.icio.us Y!MyWeb  
Search  
 
ASCII Text  x  
A.V. Goldberg, B.M. Maggs, S.A. Plotkin, "A Parallel Algorithm for Reconfiguring a Multibutterfly Network with Faulty Switches," IEEE Transactions on Computers, vol. 43, no. 3, pp. 321326, March, 1994.  
BibTex  x  
@article{ 10.1109/12.272432, author = {A.V. Goldberg and B.M. Maggs and S.A. Plotkin}, title = {A Parallel Algorithm for Reconfiguring a Multibutterfly Network with Faulty Switches}, journal ={IEEE Transactions on Computers}, volume = {43}, number = {3}, issn = {00189340}, year = {1994}, pages = {321326}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.272432}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  A Parallel Algorithm for Reconfiguring a Multibutterfly Network with Faulty Switches IS  3 SN  00189340 SP321 EP326 EPD  321326 A1  A.V. Goldberg, A1  B.M. Maggs, A1  S.A. Plotkin, PY  1994 KW  hypercube networks; fault tolerant computing; parallel algorithms; parallel algorithm; multibutterfly network reconfiguration; faulty switches; deterministic algorithm; offline computation; worstcase faults. VL  43 JA  IEEE Transactions on Computers ER   
This paper describes a deterministic algorithm for reconfiguring a multibutterfly network with faulty switches. Unlike previous reconfiguration algorithms, the algorithm is performed entirely by the network, without the aid of any offline computation, even though many of the switches may be faulty. The algorithm reconfigures an Ninput multibutterfly network in O(logN) time. After reconfiguration, the multibutterfly can tolerate f worstcase faults and still route any permutation between some set of N/spl minus/O(f) inputs and N/spl minus/O(f) outputs in O(log N) time.
[1] R. I. Greenberg and C. E. Leiserson, "Randomized routing on fattrees," inRandomness and Computation (Advances in Computing Research), S. Micali, Ed. Greenwich, CT: JAI Press, 1989, vol. 5, pp. 345374.
[2] N. Kahale, "Better expansion for ramanujan graphs," inProc. 32nd Annu. Symp. Foundations Comput. Sci., IEEE, Oct. 1991, pp. 398404.
[3] R. R. Koch, "Increasing the size of a network by a constant factor can increase performance by more than a constant factor," inProc. 29th Annu. Symp. Foundations Comput. Sci., IEEE, Oct. 1988, pp. 221230.
[4] C. P. Kruskal and M. Snir, "The performance of multistage interconnection networks for multiprocessors,"IEEE Trans. Comput., vol. C32, no. 12, pp. 10911098, Dec. 1983.
[5] C. P. Kruskal and M. Snir, "A unified theory of interconnection network structure,"Theoret. comput. Sci., vol. 48, pp. 7594, 1986.
[6] F. T. Leighton and B. M. Maggs, "Fast algorithms for routing around faults in multibutterflies and randomlywired splitter networks,"IEEE Trans. Comput., vol. 41, no. 5, pp. 578587, May 1992.
[7] T. Leighton, C. L. Leiserson, and M. Klugerman, "Theory of parallel and VLSI computation," Res. Seminar Series Rep. MIT/LCS/RSS 10, MIT Lab. for Comput. Sci., May 1991.
[8] C. E. Leiserson, "Fattrees: Universal networks for hardwareefficient supercomputing,"IEEE Trans. Comput., vol. C34, pp. 892900, Oct. 1985.
[9] A. Lubotzky, R. Philips, and P. Sarnak, "Ramanujan graphs,"Combinatorica, vol. 8, no. 3, pp. 261277, 1988.
[10] B. M. Maggs and R. K. Sitaraman, "Simple algorithms for routing on butterfly networks with bounded queues," inProc. 24th Annual ACM Symp. Theory of Computing, May 1992, pp. 150161.
[11] R. D. Rettberg, W. R. Crowther, P. P. Carvey, and R. S. Tomlinson, "The monarch parallel processor hardware design,"Comput., vol. 23, no. 4, pp. 1830, Apr. 1990.
[12] E. Upfal, "AnO(logN) deterministic packet routing scheme," inProc. 21st Annu. ACM Symp. Theory Comput., May 1989, pp. 241250.