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S.J. Piestrak, "Design of Residue Generators and Multioperand Modular Adders Using CarrySave Adders," IEEE Transactions on Computers, vol. 43, no. 1, pp. 6877, January, 1994.  
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@article{ 10.1109/12.250610, author = {S.J. Piestrak}, title = {Design of Residue Generators and Multioperand Modular Adders Using CarrySave Adders}, journal ={IEEE Transactions on Computers}, volume = {43}, number = {1}, issn = {00189340}, year = {1994}, pages = {6877}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.250610}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  Design of Residue Generators and Multioperand Modular Adders Using CarrySave Adders IS  1 SN  00189340 SP68 EP77 EPD  6877 A1  S.J. Piestrak, PY  1994 KW  adders; digital arithmetic; residue generators; multioperand modular adders; carrysave adders; arithmetic error detecting codes; binarytoresidue number system; residue generator; Chinese remainder theorem; arithmetic codes; residue number system; residue arithmetic. VL  43 JA  IEEE Transactions on Computers ER   
Residue generator is an essential building block of encoding/decoding circuitry for arithmetic error detecting codes and binarytoresidue number system (RNS) converter. In either case, a residue generator is an overhead for a system and as such it should be built with minimum amount of hardware and should not compromise the speed of a system. Multioperand modular adder (MOMA) is a computational element used to implement various operations in digital signal processing systems using RNS. A comprehensive study of new residue generators and MOMA's is presented. The design methods given here take advantage of the periodicity of the series of powers of 2 taken module A (A is a module). Four design schemes of the ninput residue generators mod A, which are best suited for various pairs of n and A, are proposed. Their pipelined versions can be clocked with the cycle determined by the delay of a fulladder and a latch. A family of design methods for parallel and wordserial, using similar concepts, is also given. Both classes of circuits employ new highlyparallel schemes using carrysave adders with endaround carry and a minimal amount of ROM and are wellsuited for VLSI implementation. They are faster and use less hardware than similar circuits known to date. One of the MOMA's can be used to build a highspeed residuetobinary converter based on the Chinese remainder theorem.
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