CSDL - IEEE Transactions on Computers

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1994
Issue No. 1 - January

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IEEE Transactions on Computers

January 1994 (vol. 43 no. 1)

ISSN: 0018-9340

Table of Contents

PAPERS

Cycle Compensation Protocol: A Fair Protocol for the Unidirectional Twin-Bus Architecture (Abstract)

Yean-Shiang Leu

D.H.C. Du

pp. 1-12

ABSTRACT

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Near Embeddings of Hypercubes into Cayley Graphs on the Symmetric Group (Abstract)

pp. 13-22

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Efficient Resource Placement in Hypercubes Using Multiple-Adjacency Codes (Abstract)

Hsing-Lung Chen

Nian-Feng Tzeng

pp. 23-33

ABSTRACT

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High-Speed Area-Efficient Multiplier Design Using Multiple-Valued Current-Mode Circuits (Abstract)

pp. 34-42

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Accurate Rounding Scheme for the Newton-Raphson Method Using Redundant Binary Representation (Abstract)

pp. 43-51

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Performance Evaluation of Hierarchical Ring-Based Shared Memory Multiprocessors (Abstract)

M. Holliday

M. Stumm

pp. 52-67

ABSTRACT

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Design of Residue Generators and Multioperand Modular Adders Using Carry-Save Adders (Abstract)

S.J. Piestrak

pp. 68-77

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Large Dynamic Range Computations Over Small Finite Rings (Abstract)

pp. 78-86

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BRIEF CONTRIBUTIONS

On Distributed Computing Systems Reliability Analysis Under Program Execution Constraints (Abstract)

Deng-Jyi Chen

Min-Sheng Lin

pp. 87-97

ABSTRACT

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Use of Fault Dropping for Multiple Fault Analysis (Abstract)

pp. 98-103

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Sequential and Parallel Neural Network Vector Quantizers (Abstract)

K.K. Parhi

F.H. Wu

K. Genesan

pp. 104-109

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Performance Analysis of Cluster-Based Multiprocessors (Abstract)

pp. 109-114

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Automated Verification of Behavioral Equivalence for Microprocessors (Abstract)

F. Corella

pp. 115-117

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An Optimization Technique for the Design of Multiple Valued PLA's (Abstract)

K.V. Asari

C. Eswaran

pp. 118-122

ABSTRACT

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Generation of all Reed-Muller Expansions of a Switching Function (Abstract)

B. Vinnakota

V.V.B. Rao

pp. 122-124

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COMMENTS

A Note on "A Systematic (12,8) Code for Correcting Single Errors and Detecting Adjacent Errors" (Abstract)

pp. 125

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Comments on "Synthetic Traces for Trace-Driven Simulation of Cache Memories" (Abstract)

S.M. Mahmud

pp. 125-126

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