This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Accelerated Two-Level Carry-Skip Adders-A Type of Very Fast Adders
November 1993 (vol. 42 no. 11)
pp. 1389-1393

This paper describes a new type of carry-skip adder, which can be faster than the conventional two-level carry-skip adders. A way to design optimum adders of this new type is described. In optimum adders of this type, the sizes of the sections of bit positions are bimodal, but the sizes of the blocks in each section are unimodal, unlike the bimodal block sizes in Guyot et al.'s traditional two-level carry-skip adders. A 60-b 2- mu m CMOS adder of this type is designed. This adder's simulated delay is approximately 12.6 ns.

[1] M. Annaratone,Digital CMOS Circuit Design. Boston, MA: Kluwer Academic, 1986.
[2] C. Babbage,On the Mathematical Powers of the Calculating Engine, 1837. (Reprinted inThe Origins of Digital Computers, B. Randell, Ed. Berlin: Springer-Verlag, 1973.
[3] Pak K. Chan and Martine D. F. Schlag, "Analysis and design of CMOS manchester adders with variable carry-skip,"IEEE Trans. Comput., Aug. 1990; an earlier version appeared inProc. 9th IEEE Symp. Comput. Arithmetic, 1989.
[4] L. A. Glasser and D. W Dobberpuhl,The Design and Analysis of VLSI Circuits. Reading, MA: Addison-Wesley, 1985.
[5] A. Guyot, B. Hochet, and J.-M. Muller, "A way to build efficient carry-skip adders,"IEEE Trans. Comput., vol. C-36, no. 4, pp. 1144-1151, Oct. 1987.
[6] V. Kantabutra, "Designing optimum one-level carry-skip adders,"IEEE Trans. Comput., vol. 42, no. 6, pp. 759-764, June 1993.
[7] V. Kantabutra, "A recursive carry-lookahead/carry-select hybrid adder,"IEEE Trans. Comput., to appear.
[8] T. Lynch and E. Swartzlander, "A spanning tree carry lookahead adder,"IEEE Trans. Comput., vol. 41, Aug. 1992.
[9] V. G. Oklobdzija and E. R. Barnes, "Some optimal schemes for ALU implementation in VLSI technology," inProc. 7th Symp. Comput. Arithmetic, 1985.
[10] S. Turrini, "Optimal group distribution in carry-skip adders," inProc. 9th Comput. Arithmetic Symp., Santa Monica, Los Angeles, Sept. 1989, pp. 96-103.

Index Terms:
accelerated two-level carry-skip adders; bit positions; bimodal; unimodal; CMOS VLSI; 12.6 sec; 2 micron; adders; CMOS integrated circuits; delays; VLSI.
Citation:
V. Kantabutra, "Accelerated Two-Level Carry-Skip Adders-A Type of Very Fast Adders," IEEE Transactions on Computers, vol. 42, no. 11, pp. 1389-1393, Nov. 1993, doi:10.1109/12.247841
Usage of this product signifies your acceptance of the Terms of Use.