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M.A. Hasan, M.Z. Wang, V.K. Bhargava, "A Modified MasseyOmura Parallel Multiplier for a Class of Finite Fields," IEEE Transactions on Computers, vol. 42, no. 10, pp. 12781280, October, 1993.  
BibTex  x  
@article{ 10.1109/12.257715, author = {M.A. Hasan and M.Z. Wang and V.K. Bhargava}, title = {A Modified MasseyOmura Parallel Multiplier for a Class of Finite Fields}, journal ={IEEE Transactions on Computers}, volume = {42}, number = {10}, issn = {00189340}, year = {1993}, pages = {12781280}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.257715}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  A Modified MasseyOmura Parallel Multiplier for a Class of Finite Fields IS  10 SN  00189340 SP1278 EP1280 EPD  12781280 A1  M.A. Hasan, A1  M.Z. Wang, A1  V.K. Bhargava, PY  1993 KW  MasseyOmura parallel multiplier; finite fields; cyclically shifted versions; polynomials; input cyclic shift; redundancy; lower circuit complexity; digital arithmetic; multiplying circuits; polynomials. VL  42 JA  IEEE Transactions on Computers ER   
A MasseyOmura parallel multiplier of finite fields GF(2/sup m/) contains m identical blocks whose inputs are cyclically shifted versions of one another. It is shown that for fields GF(2/sup m/) generated by irreducible all one polynomials, a portion of the block is independent of the input cyclic shift; hence, the multiplier contains redundancy. By removing the redundancy, a modified parallel multiplier is presented which is modular and has a lower circuit complexity.
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