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Creating Disjoint Paths in Gamma Interconnection Networks
October 1993 (vol. 42 no. 10)
pp. 1247-1252

The Gamma interconnection network (GIN) is composed of 3*3 basic building blocks, with interconnecting patterns between stages following the plus-minus-2/sup i/ functions. The authors consider modifications to the GIN by altering the interconnecting patterns between stages so as to achieve high terminal reliability between any source-destination pair, resulting in the reliable GIN (REGIN). A type of REGIN's ensures totally disjoint paths in existence from any source to any destination, thereby capable of tolerating an arbitrary single fault. If several building blocks (i.e., 3*3 switches) are fabricated in one chip with very large scale integrated (VLSI) technology, the layout area and the pin count are less for the REGIN than for its GIN counterpart as a result of the change in the interconnecting patterns, giving rise to potential cost reduction. The terminal reliability of the REGIN is derived and compared with that of a compatible GIN. In addition, the performance of the REGIN is evaluated using simulation.

[1] D. S. Parker and C. S. Raghavendra, "The Gamma Network,"IEEE Trans. Computers, vol. C-33, pp. 367-373, Apr. 1984.
[2] H. J. Siegel and S. D. Smith, "Study of multistage SIMD interconnection networks," inProc. 5th Annu. Symp. Comput. Architecture, Apr. 1978, pp. 223-229.
[3] R. J. McMillen and H. J. Siegel, "Performance and fault tolerance improvements in the inverse augmented data manipulator network," inProc. 9th Annu. Symp. Comput. Architecture, Apr. 1982, pp. 63-72.
[4] C. S. Raghavendra and D. S. Parker, "Reliability Analysis of an Interconnection Network,"Proc. 4th Int'l Conf. Distributed Computing Systems, May 1984, pp. 461-471.
[5] R. J. McMillen and H. J. Siegel, "Routing Schemes for the Augmented Data Manipulator Network in an MIMD System,"IEEE Trans. Computers, vol. C-31, pp. 1202-1214, Dec. 1982.

Index Terms:
disjoint paths; Gamma interconnection networks; high terminal reliability; source-destination pair; VLSI; layout area; pin count; simulation; performance; fault tolerant computing; multiprocessor interconnection networks; network routing; performance evaluation.
Citation:
Nian-Feng Tzeng, Po-Jen Chuang, Chwan-Hwa Wu, "Creating Disjoint Paths in Gamma Interconnection Networks," IEEE Transactions on Computers, vol. 42, no. 10, pp. 1247-1252, Oct. 1993, doi:10.1109/12.257710
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