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E.M. Schwarz, M.J. Flynn, "Parallel HighRadix Nonrestoring Division," IEEE Transactions on Computers, vol. 42, no. 10, pp. 12341246, October, 1993.  
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@article{ 10.1109/12.257709, author = {E.M. Schwarz and M.J. Flynn}, title = {Parallel HighRadix Nonrestoring Division}, journal ={IEEE Transactions on Computers}, volume = {42}, number = {10}, issn = {00189340}, year = {1993}, pages = {12341246}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.257709}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
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TY  JOUR JO  IEEE Transactions on Computers TI  Parallel HighRadix Nonrestoring Division IS  10 SN  00189340 SP1234 EP1246 EPD  12341246 A1  E.M. Schwarz, A1  M.J. Flynn, PY  1993 KW  parallel highradix nonrestoring division; quotient estimation; combinatorial algorithm; generalized partial remainder; carry propagate adder; latency; computer arithmetic; highradix division; logic design; SRT division; digital arithmetic; logic design. VL  42 JA  IEEE Transactions on Computers ER   
An algorithm for highradix nonrestoring division is proposed which combines a costefficient quotient estimation technique with collapsing of the division into one operation each iteration. The quotient estimation technique is a direct combinatorial algorithm which allows a more generalized partial remainder than similar studies. In addition, the successor partial remainder is calculated directly from the previous partial remainder. The intermediate steps of calculating the next quotient estimate, multiplying it by the divisor, and then subtracting the result from the previous remainder are telescoped into one step. This is possible due to the use of simple direct combinatorial equations for the quotient estimate. Thus, one operation is used to generate the next remainder from the previous remainder. This operation is similar to a multiplication with a reduced carry propagate adder. This algorithm reduces the latency of each iteration to less than the delay of one multiplication. Thus, highradix nonrestoring division is possible with a low latency and no need for an offchip ROM to hold a quotient estimate.
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