Issue No.09 - September (1993 vol.42)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.241600
<p>To reduce the high test time for serial scan designs, the use of multiple scan chains has been proposed. In this paper, the authors consider the problem of optimally constructing the multiple scan chains to minimize the overall test time. Rather than follow the traditional practice of using equal length chains, the authors allow the chains to be of different lengths and show that this cap lead to lower test times. The main idea in this approach is to place those scan elements that are more frequently accessed in shorter scan chains as this tends to reduce the overall test time. Given a design with N scan elements and given that if scan chains need to be used for applying tests, the authors present an algorithm of complexity O(kN/sup 2/) for constructing the specified number of chains such that the overall test application time is minimized. By analyzing a range of different circuit topologies, the authors demonstrate test time reductions as large as 40% over equal length chains.</p>
multiple scan chains; test time; serial scan designs; complexity; test time reductions; dynamic programming; equal length chains; full scan; optimal chain configurations; partial scan; polynomial time complexity; computational complexity; design for testability; logic testing.
S. Narayanan, R. Gupta, M.A. Breuer, "Optimal Configuring of Multiple Scan Chains", IEEE Transactions on Computers, vol.42, no. 9, pp. 1121-1131, September 1993, doi:10.1109/12.241600