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The Design of Fault-Tolerant Linear Digital State Variable Systems: Theory and Techniques
July 1993 (vol. 42 no. 7)
pp. 794-808

A theory for error detection in linear digital state variable systems is described. With the aid of a tool called the gain matrix, it is shown that the effect of error propagation along different paths of the circuit can be analyzed. For circuits with operator fanout, it is shown that despite the fact that single faulty operators cause multiple state variables to be erroneous, no more additional check variables are required than for circuits without operator fanout. It is further shown that hardware optimization can be performed by sharing hardware functions between the original state variable system and its error detection circuitry. The analysis is performed for both single and multiple faulty operators. A scheme for error correction that performs error correction in real time is proposed. Experimental results that illustrate the practical viability of the proposed scheme are discussed.

[1] A. V. Oppenheim and R. W. Schafer,Digital Signal Processing. Englewood Cliffs, NJ: Prentice-Hall, 1975.
[2] L. R. Rabiner and B. Gold,Theory and Applications of Digital Signal Processing. Englewood Cliffs, NJ: Prentice Hall, 1975.
[3] G. W. Swisher,Linear system analysis. Champaign, IL: Matrix, 1976.
[4] A. Papoulis,Circuits and Systems: A Modern Approach. New York: Holt Rinehart and Winston, 1980.
[5] B.C. Kuo,Digital Control Systems, Holt, Rinehart, and Winston, New York, 1980.
[6] D. Remshaw and P. Denyer,VLSI Signal Processing: A Bit-Serial Approach, Addison Wesley, Reading, Mass., 1985.
[7] R. Hartley and J. Jasica, "Behavioral to Structural Translation in a Bit-Serial Silicon Compiler,"IEEE Trans. Computer-Aided Design, Vol. 7, No. 8, Aug 1988, pp. 887-886.
[8] Park, N., and A. Park, "Sehwa: A Software Package for Synthesis of Pipelines from Behavioral Specifications,"IEEE Trans. Computer-Aided Design, Vol. CAD-7, No. 3, Mar. 1988, pp. 356-370.
[9] G. Goosens, R. Jain, J. Vandewalle, and H. de Man, "An optimal and flexible delay management technique for VLSI," inProc. Symp. Mathematical Theory of Networks and Systems, Stockholm, Sweden, 1985.
[10] K. H. Huang and J. A. Abraham, "Algorithm-based fault tolerance for matrix operations,"IEEE Trans. Comput., vol. C-33, pp. 518-528, June 1984.
[11] J. Y. Jou and J. A. Abraham, "Fault tolerant FFT networks,"IEEE Trans. Comput., vol. 37, pp. 548-561, May 1988.
[12] J. Y. Jou and J. A. Abraham, "Fault-tolerant matrix arithmetic and signal processing on highly concurrent computing structures,"Proc. IEEE, vol. 74, no. 5, pp. 732-741, May 1986.
[13] A. L. N. Reddy and P. Banerjee, "Algorithm-based fault detection for signal processing applications,"IEEE Trans. Comput., vol. 39, no. 10, pp. 1304-1308, Oct. 1990.
[14] G. M. Megson and D. J. Davis, "Algorithmic fault tolerance for matrix operations on triangular arrays,"J. Parallel Comput., vol. 10, no. 2, pp. 207-219, Apr. 1989.
[15] F. T. Luk and H. Park, "Analysis of algorithm-based fault tolerance techniques," inJ. Parallel Distribut. Comput., vol. 5, pp. 172-184, 1988.
[16] V. Balasubramanian and P. Banerjee, "Compiler-assisted synthesis of algorithm-based checking in multiprocessors,"IEEE Trans. Comput., vol. 39, no. 4, pp. 436-446, Apr. 1990.
[17] V. S. S. Nair and J. A. Abraham, "Real-number codes for fault-tolerant matrix operations on processor arrays,"IEEE Trans. Comput., vol. 39, no. 4, pp. 426-435, Apr. 1990.
[18] A. Chatterjee and M. A. d'Abrcu, "An error detection and fault tolerance scheme for digital state-variable systems," Patent No. RD20554, May 1991.
[19] A. Antoniou,Digital Filters: Analysis and Design. New Delhi, India: Tata McGraw-Hill, 1980, ch. 12.

Index Terms:
fault-tolerant linear digital state variable systems; error detection; gain matrix; error propagation; single faulty operators; hardware optimization; hardware functions; error correction; error correction; error detection; fault tolerant computing.
A. Chatterjee, M.A. d'Abreu, "The Design of Fault-Tolerant Linear Digital State Variable Systems: Theory and Techniques," IEEE Transactions on Computers, vol. 42, no. 7, pp. 794-808, July 1993, doi:10.1109/12.237720
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