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Issue No.07 - July (1993 vol.42)
pp: 769-779
ABSTRACT
<p>The coordinate rotation digital computer (CORDIC) algorithm is used in numerous special-purpose systems for real-time signal processing applications. An analysis of fixed-point CORDIC in the Y-reduction mode, which allows computation of the inverse tangent function, shows that unnormalized input values can result in large numerical errors. The authors describe two approaches for tackling the numerical accuracy problem. The first approach builds on a fixed-point CORDIC unit and eliminates the problem by including additional hardware for normalization. A method for integrating the normalization operation with the CORDIC iterations for efficient implementation in O(n/sup 1.5/) hardware is provided. The second solution to the accuracy problem is to use a floating-point CORDIC unit but reduce the implementation complexity by using a hybrid architecture. Arguments to support the use of such an architecture in certain special-purpose arrays are presented.</p>
INDEX TERMS
numerical accuracy; hardware tradeoffs; CORDIC arithmetic; special-purpose processors; coordinate rotation digital computer; real-time signal processing; Y-reduction mode; inverse tangent function; floating-point CORDIC; implementation complexity; hybrid architecture; special-purpose arrays; digital arithmetic; signal processing.
CITATION
K. Kota, "Numerical Accuracy and Hardware Tradeoffs for CORDIC Arithmetic for Special-Purpose Processors", IEEE Transactions on Computers, vol.42, no. 7, pp. 769-779, July 1993, doi:10.1109/12.237718
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