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P. Montuschi, L. Ciminiera, "Reducing Iteration Time When Result Digit is Zero for Radix 2 SRT Division and Square Root with Redundant Remainders," IEEE Transactions on Computers, vol. 42, no. 2, pp. 239246, February, 1993.  
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@article{ 10.1109/12.204797, author = {P. Montuschi and L. Ciminiera}, title = {Reducing Iteration Time When Result Digit is Zero for Radix 2 SRT Division and Square Root with Redundant Remainders}, journal ={IEEE Transactions on Computers}, volume = {42}, number = {2}, issn = {00189340}, year = {1993}, pages = {239246}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.204797}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  Reducing Iteration Time When Result Digit is Zero for Radix 2 SRT Division and Square Root with Redundant Remainders IS  2 SN  00189340 SP239 EP246 EPD  239246 A1  P. Montuschi, A1  L. Ciminiera, PY  1993 KW  radix 2 SRT division; square root; redundant remainders; digit 0; digital arithmetic. VL  42 JA  IEEE Transactions on Computers ER   
A new architecture is presented for shared radix 2 division and square root whose main characteristic is the ability to avoid any addition/subtraction, when the digit 0 has been selected. The solution presented uses a redundant representation of the partial remainder, while keeping the advantages of classical solutions. It is shown how the next digit of the result can be selected even when the remainder is not updated, and the subsequent tradeoff is presented. The proposed architecture is also extended in order to consider other implementations.
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