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R. Kapur, M.R. Mercer, "Bounding Signal Probabilities for Testability Measurement Using Conditional Syndromes," IEEE Transactions on Computers, vol. 41, no. 12, pp. 15801588, December, 1992.  
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@article{ 10.1109/12.214666, author = {R. Kapur and M.R. Mercer}, title = {Bounding Signal Probabilities for Testability Measurement Using Conditional Syndromes}, journal ={IEEE Transactions on Computers}, volume = {41}, number = {12}, issn = {00189340}, year = {1992}, pages = {15801588}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.214666}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
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TY  JOUR JO  IEEE Transactions on Computers TI  Bounding Signal Probabilities for Testability Measurement Using Conditional Syndromes IS  12 SN  00189340 SP1580 EP1588 EPD  15801588 A1  R. Kapur, A1  M.R. Mercer, PY  1992 KW  bounding algorithm; circuit faults; signal probabilities; testability measurement; conditional syndromes; random pattern testability; auxiliary gate; lower bounds; pseudorandom pattern resistant faults; circuit structure; builtin self test; circuit analysis computing; computational complexity; integrated circuit testing. VL  41 JA  IEEE Transactions on Computers ER   
An algorithm for bounding the random pattern testability of individual faults in a circuit is proposed. Auxiliary gates for bounding the testability are constructed, converting the problem into one of determining the signal probability at the output of the auxiliary gate. The results presented are in terms of lower bounds of the testabilities of faults. The bounds generated by the algorithm can be used by designers to identify pseudorandom pattern resistant faults, to enable them to modify the circuit structure to make the faults easy to detect, and, hence, to increase the fault coverage.
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