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Single-Precision Multiplier with Reduced Circuit Complexity for Signal Processing Applications
October 1992 (vol. 41 no. 10)
pp. 1333-1336

When two numbers are multiplied, a double-wordlength product is produced. In applications where only the single-precision product is required, the double-wordlength result is rounded to single-precision. Hence, in single-precision applications, it is not necessary to compute the least significant part of the product exactly. Instead, it is only necessary to estimate the carries generated in the computation of the least significant part that will ripple into the most significant part of the product. This will produce a single-precision multiplier with significantly reduced circuit complexity. Three novel methods for realizing this class of reduced complexity single-precision multipliers are introduced and their performance analyzed.

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Index Terms:
single precision multiplier; reduced circuit complexity; signal processing applications; digital arithmetic; multiplying circuits; signal processing.
Citation:
Y.C. Lim, "Single-Precision Multiplier with Reduced Circuit Complexity for Signal Processing Applications," IEEE Transactions on Computers, vol. 41, no. 10, pp. 1333-1336, Oct. 1992, doi:10.1109/12.166611
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