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Vector Register Allocation
October 1992 (vol. 41 no. 10)
pp. 1290-1317

The problem of allocating vector registers on supercomputers is addressed in the context of compiling vector languages. Two subproblems must be solved to achieve good vector register allocation. First, the vector operations in the source program must be subdivided into sections that fit the hardware of the target machine. Second, the locality of reference of the vector operations must be improved via aggressive program transformations. Solutions to both of these problems, based on the use of novel aspects of data dependence, are presented. The techniques described extend naturally to scalar machines by observing that a scalar register is simply a vector register of length one.

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Index Terms:
vector register allocation; supercomputers; compiling vector languages; aggressive program transformations; data dependence; parallel processing; program compilers.
Citation:
R. Allen, K. Kennedy, "Vector Register Allocation," IEEE Transactions on Computers, vol. 41, no. 10, pp. 1290-1317, Oct. 1992, doi:10.1109/12.166606
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