Issue No.09 - September (1992 vol.41)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.165402
<p>A method for the generation of detailed models of fault-tolerant processor arrays, based on stochastic Petri nets (SPNs), is presented. A compact SPN model of the array associates with each transition a set of attributes that includes a discrete probability distribution. Depending on the type of component and the reconfiguration scheme, these probabilities are determined using simulation or closed-form expressions and correspond to the survival of the array given that a number of components required by the reconfiguration process are faulty.</p>
reliability analysis; fault-tolerant processor arrays; stochastic Petri nets; discrete probability distribution; simulation; closed-form expressions; fault tolerant computing; parallel processing; Petri nets; probability; reliability theory; stochastic processes.
N. Lopez-Benitez, J.A.B. Fortes, "Detailed Modeling and Reliability Analysis of Fault-Tolerant Processor Arrays", IEEE Transactions on Computers, vol.41, no. 9, pp. 1193-1200, September 1992, doi:10.1109/12.165402