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T. Damarla, "Generalized Transforms for Multiple Valued Circuits and Their Fault Detection," IEEE Transactions on Computers, vol. 41, no. 9, pp. 11011109, September, 1992.  
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@article{ 10.1109/12.165392, author = {T. Damarla}, title = {Generalized Transforms for Multiple Valued Circuits and Their Fault Detection}, journal ={IEEE Transactions on Computers}, volume = {41}, number = {9}, issn = {00189340}, year = {1992}, pages = {11011109}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.165392}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  Generalized Transforms for Multiple Valued Circuits and Their Fault Detection IS  9 SN  00189340 SP1101 EP1109 EPD  11011109 A1  T. Damarla, PY  1992 KW  generalised transforms; simple transforms; multiple valued functions; multiple value network; stuck at faults; test set generation; multiple valued circuits; fault detection; canonical representation; radix; spectral coefficients; test patterns; bridging faults; upper bound; fault location; logic circuits; manyvalued logics; transforms; VLSI. VL  41 JA  IEEE Transactions on Computers ER   
Simple transforms for obtaining canonical representation of multiplevalued (MV) functions in polarity k, k in (0, 1,. . ., p/sup n/1), are presented, where p and n denote the radix and the number of variables of a function. The coefficients in a canonical representation are called spectral coefficients. Various relationships between the functional values of a function and its spectral coefficients are given. Fault detection in an arbitrary MV network is considered using test patterns and spectral techniques. Upper bounds on the number of test patterns for detection of stuckat and bridging faults at the input lines are shown to be pn and n1, respectively. Fault detection by spectral techniques is done based on the number of spectral coefficients affected by a fault, and hence it is independent of the technology used for construction of networks and the type of fault. Test set generation for detection of any fault in (E), where (E) denotes all faults in the network, is given. An upper bound on the number of test patterns required to detect all faults in (E) is obtained.
[1] S. L. Hurst, "Two decades of multiplevalued logicAn invited tutorial," inProc. IEEE Int. Symp. Multiple Valued Logic, May 1988, pp. 164177.
[2] D. A. Rich, "A survey of multiple valued memories,"IEEE Trans. Comput., vol. C35, no. 2, pp. 99106, Feb. 1986.
[3] Y. H. Cho and H. T. Mouftah, "A CMOS ternary ROM chip," inProc. IEEE Int. Symp. Multiple Valued Logic, May 1988, pp. 358363.
[4] M. H. A. Barr, S. G. Zaky, and Z. G. Vranesic, "Synthesis of multiple valued multithreshold functions for CCD implementation,"IEEE Trans. Comput., vol. C35, no. 2, pp. 124133, Feb. 1986.
[5] P. W. Besslich, "Heuristic minimization of MVL functions: A direct cover approach,"IEEE Trans. Comput., pp. 134144, Feb. 1986.
[6] G. W. Dueck and D. M. Miller, "Direct search minimization of multiplevalued functions," inProc. IEEE Int. Symp. Multiple Valued Logic, May 1988, pp. 218225.
[7] K. L. Kodandapani and R. V. Setlur, "A cellular array for multiplevalued logic functions," inProc. IEEE Int. Symp. Multiple Valued Logic, May 1974, pp. 529539.
[8] K. L. Kodandapani and R. V. Setlur, "Multivalued algebraic generalizations of ReedMuller canonical forms," inProc. IEEE Int. Symp. Multiple Valued Logic, May 1974, pp. 505526.
[9] D. H. Green and I. S. Taylor, "Multiplevalued switching circuit design by means of generalized ReedMuller expansions,"Digital Processes, vol. 2, pp. 6381, 1976.
[10] D. K. Pradhan, "A multiple valued switching algebra based on finite fields," inProc. IEEE Int. Symp. Multiple Valued Logic, May 1974, pp. 95112.
[11] O. H. Ibarra and S. K. Sahni, "Polynomially complete fault detection problems,"IEEE Trans. Comput., vol. C24, pp. 242249, Mar. 1975.
[12] T. Damarla and M. Karpovsky, "Fault detection in combinational networks by ReedMuller transforms,"IEEE Trans. Comput., vol. C38, no. 6, pp. 788797, June 1989.
[13] T. Damarla, "Fault detection in multiple valued logic circuits," inIEEE Proc. Int. Symp. Multiple Valued Logic, Univ. North Carolina at Charlotte, Charlotte, NC, May 2325, 1990, pp. 6974.
[14] A. K. Susskind, "Testing by verifying Walsh coefficients,"IEEE Trans. Comput., vol. C32, pp. 198201, 1983.
[15] S. L. Hurst, D. M. Miller, and J. C. Muzio,Spectral Techniques in Digital Logic. New York: Academic, 1985.
[16] D. M. Miller, "Spectral signature testing for multiple valued combinational networks," inProc. IEEE Int. Symp. Multiple Valued Logic, May 1982, pp. 152158.
[17] W. Peterson and E. Weldon, inErrorCorrecting Codes, Cambridge, MA: M.I.T. Press, 1984, ch. 3.
[18] D. Etimble, "Multiple valued I2L circuits for TSC checkers,"IEEE Trans. Comput., vol. C29, no. 6, pp. 537540, June 1980.
[19] J. E. Smith and J. Dussault, "Fault secure multiple valued logic networks," inProc. 8th Int. Symp. Multiple Valued Logic, May 1978, pp. 287297.