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A Radix-4 Modular Multiplication Hardware Algorithm for Modular Exponentiation
August 1992 (vol. 41 no. 8)
pp. 949-956

A fast radix-4 modular multiplication hardware algorithm is proposed. It is efficient for modular exponentiation with a large modulus, used in public-key cryptosystems such as the RSA cryptosystem. The operands and the result of multiplication which are intermediate results in modular exponentiation are represented in a redundant representation. The computation proceeds in serial-parallel fashion. Each subtraction for the division for residue calculation is embedded in the repeated multiply-add. Each intermediate result is represented in a more redundant representation than that for the operands and the result, so that the number of the required addition/subtractions is reduced. All addition/subtraction are carried out without carry propagation. A serial-parallel modular multiplier based on the algorithm has a regular cellular array structure with a bit slice feature and is suitable for VLSI implementation.

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Index Terms:
division subtraction; radix-4 modular multiplication hardware algorithm; modular exponentiation; public-key cryptosystems; RSA cryptosystem; redundant representation; residue calculation; repeated multiply-add; serial-parallel modular multiplier; cellular array structure; bit slice; VLSI; cryptography; digital arithmetic.
Citation:
N. Takagi, "A Radix-4 Modular Multiplication Hardware Algorithm for Modular Exponentiation," IEEE Transactions on Computers, vol. 41, no. 8, pp. 949-956, Aug. 1992, doi:10.1109/12.156537
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