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A Fast Translation Method for Paging on Top of Segmentation
February 1992 (vol. 41 no. 2)
pp. 247-250

A description is presented of a fast, one-step translation method that implements paging on top of segmentation. This method translates a virtual address into a physical address, performing both the segmentation and paging translations, with a single TLB (translation lookaside buffer) read and a short add. Previous methods performed this translation in two steps and required two TLB reads and a long add. Using the fast method, the fine-grain protection and relocation of segmentation combined with paging can be provided with delay and complexity comparable to paging-only systems. This method allows small segments, particularly important in object-oriented programming systems, to be managed efficiently.

[1] A. Bensoussan, C. T. Clingen, and R. C. Daley, "The multics virtual memory system: Concepts and design,"Commun. ACM, vol. 15, no. 5, pp. 308-318, May 1972.
[2] A. Chang and M. F. Mergen, "801 Storage: Architecture and programming,"ACM Trans. Comput. Syst., vol. 6, no. 1, pp. 28-50, Feb. 1988.
[3] J. B. Dennis, "Segmentation and the design of multiprogrammed computer systems,"J. ACM, vol. 12, no. 4, pp. 589-602, Oct. 1965.
[4] R. S. Fabry, "Capability-based addressing,"Commun. ACM, vol. 17, no. 7, pp. 403-412, July 1974.
[5] J. R. Falcone, "The analysis of the Smalltalk-80 system at Hewlett-Packard," inSmalltalk-80: Bits of History, Words of Advice, G. Krasner Ed. Reading, MA: Addison-Wesley, 1983, pp. 207-237.
[6] A. Goldberg and D. Robson,Smalltalk80: The Language and Its Implementation. Reading, MA: Addison-Wesley, May 1983.
[7] M. D. Hill, "A case for direct-mapped caches,"IEEE Comput. Mag., vol. 21, pp. 25-40, Dec. 1988.
[8] M. D. Hill, S. J. Eggers, J. R. Larus, G. S. Taylor, G. Adams, B. K. Bose, G.A. Gibson, P. M. Hansen, J. Keller, S. I. Kong, C. G. Lee, D. Lee, J. M. Pendleton, S.A. Ritchie, D. A. Wood, B. G. Zom, P. N. Hilfinger, D. Hodges, R. H. Katz, J. Ousterhout, and D.A. Patterson, "SPUR: A VLSI multiprocessor workstation,"IEEE Comput. Mag., vol. 19, pp. 8-22, Nov. 1986.
[9] T. Kaehler and G. Krasner, "LOOM--Large object-oriented memory for Smalltalk-80 systems," inSmalltalk-80: Bits of History, Words of Advice, G. Krasner, Ed. Reading, MA: Addison-Wesley, 1983, pp. 207-237.
[10] T. Kilburnet al., "A one-level storage system,"IRE Trans. Electron. Cornput., vol. EC-11, pp. 223-235, Apr. 1962.
[11] B. W. Lampson, "A scheduling philosophy for multiprocessing systems,"Commun. ACM, vol. 11, no. 5, pp. 347-360, May 1968.
[12] Motorola,MC88100 32-bit Third-Generation RISC Microprocessor: Technical Summary, Document BR588/D, 1988.
[13] I. Moussouriset al., "A CMOS RISC processor with integrated system function," inProc. COMPCON, 1986, pp. 126-131.
[14] M. Satyanarayanan and D. Bhandarkar, "Design tradeoffs in VAX- 11 translation buffer organization,"IEEE Comput. Mag., vol. 14, pp. 103-111, Dec. 1981.
[15] W. D. Strecker, "VAX-11/780, A virtual address extension to the PDP- 11 family," inProc. NCC, 1978, pp. 967-980.

Index Terms:
fine grain relocation; paging; segmentation; one-step translation; virtual address; physical address; translation lookaside buffer; TLB reads; fine-grain protection; object-oriented programming; virtual storage.
W.J. Dally, "A Fast Translation Method for Paging on Top of Segmentation," IEEE Transactions on Computers, vol. 41, no. 2, pp. 247-250, Feb. 1992, doi:10.1109/12.123403
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