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Increased Memory Performance During Vector Accesses Through the Use of Linear Address Transformations
February 1992 (vol. 41 no. 2)
pp. 227-230

A technique to analyze transformation matrices is presented. This technique is based on decomposing complex transformations into elementary transformations. When combined with a factorization of the access stride into two components, one a power of 2 and the other relatively prime to 2, the technique leads to an algorithmic synthesis of a CF (conflict free) storage scheme. Additionally, because the address to storage location mapping arithmetic is performed modulo 2, the time required to transform an address to its corresponding storage location is smaller and the hardware cost is lower than if schemes based on row rotation were used.

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Index Terms:
CF storage; conflict free storage; memory performance; vector accesses; linear address transformations; transformation matrices; access stride; algorithmic synthesis; storage location; mapping arithmetic; matrix algebra; parallel programming; storage management.
D.T. Harper, III, "Increased Memory Performance During Vector Accesses Through the Use of Linear Address Transformations," IEEE Transactions on Computers, vol. 41, no. 2, pp. 227-230, Feb. 1992, doi:10.1109/12.123399
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