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S. Vassiliadis, E.M. Schwarz, B.M. Sung, "HardWired Multipliers with Encoded Partial Products," IEEE Transactions on Computers, vol. 40, no. 11, pp. 11811197, November, 1991.  
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@article{ 10.1109/12.102823, author = {S. Vassiliadis and E.M. Schwarz and B.M. Sung}, title = {HardWired Multipliers with Encoded Partial Products}, journal ={IEEE Transactions on Computers}, volume = {40}, number = {11}, issn = {00189340}, year = {1991}, pages = {11811197}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.102823}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  HardWired Multipliers with Encoded Partial Products IS  11 SN  00189340 SP1181 EP1197 EPD  11811197 A1  S. Vassiliadis, A1  E.M. Schwarz, A1  B.M. Sung, PY  1991 KW  hardwired multipliers; encoded partial products; multibit overlapped scanning multiplication algorithm; signmagnitude; two's complement; digital arithmetic; encoding; multiplying circuits. VL  40 JA  IEEE Transactions on Computers ER   
A multibit overlapped scanning multiplication algorithm for signmagnitude and two's complement hardwired multipliers is presented. The theorems necessary to construct the multiplication matrix for signmagnitude representations are emphasized. Consequently, the algorithm for signmagnitude multiplication and its variation to include two's complement numbers are presented. The proposed algorithm is compared to previous algorithms that generate a sign extended partial product matrix, with an implementation and with a study of the number of elements in the partial product matrix. The proposed algorithm is shown to yield significant savings over well known algorithms for the generation and the reduction of the partial product matrix of a multiplier designed with multibit overlapped scanning.
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