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Eliminating Interlocks in Deeply Pipelined Processors by Delay Enforced Multistreaming
October 1991 (vol. 40 no. 10)
pp. 1125-1132

The delay enforced multistreaming (DEMUS) processor architecture provides a simple, inexpensive ways of achieving high hardware utilization in deeply pipelined processors. Multiple streams share the pipeline in an interleaved fashion. Both the data dependency problem and the jump problem are prevented by enforcing enough interdispatch delay on each individual stream to prevent successive instructions from interfering with each other's execution. The structure and operation of a small DEMUS processor are presented, and four stream dispatching algorithms are compared by means of a simple simulation. Of the three implementable algorithms, the modified fixed delay (DEMUS/MFD) and encoded delay with fixed minimum (DEMUS/EDF) mechanisms yield the highest performance.

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Index Terms:
interleaving; interlocks; deeply pipelined processors; delay enforced multistreaming; processor architecture; data dependency problem; jump problem; interdispatch delay; stream dispatching algorithms; modified fixed delay; encoded delay with fixed minimum; pipeline processing.
Citation:
D.C. McCrackin, "Eliminating Interlocks in Deeply Pipelined Processors by Delay Enforced Multistreaming," IEEE Transactions on Computers, vol. 40, no. 10, pp. 1125-1132, Oct. 1991, doi:10.1109/12.93745
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