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M.H. Nodine, D.P. Lopresti, J.S. Vitter, "I/O Overhead and Parallel VLSI Architectures for Lattice Computations," IEEE Transactions on Computers, vol. 40, no. 7, pp. 843852, July, 1991.  
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@article{ 10.1109/12.83622, author = {M.H. Nodine and D.P. Lopresti and J.S. Vitter}, title = {I/O Overhead and Parallel VLSI Architectures for Lattice Computations}, journal ={IEEE Transactions on Computers}, volume = {40}, number = {7}, issn = {00189340}, year = {1991}, pages = {843852}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.83622}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }  
RefWorks Procite/RefMan/Endnote  x  
TY  JOUR JO  IEEE Transactions on Computers TI  I/O Overhead and Parallel VLSI Architectures for Lattice Computations IS  7 SN  00189340 SP843 EP852 EPD  843852 A1  M.H. Nodine, A1  D.P. Lopresti, A1  J.S. Vitter, PY  1991 KW  input/output overhead; parallel VLSI architectures; complexity measure; VLSI implementations; lattice computations; physical systems; multigeneration sweep architecture; computational complexity; lattice theory and statistics; parallel architectures; physics computing. VL  40 JA  IEEE Transactions on Computers ER   
The authors introduce input/output (I/O) overhead psi as a complexity measure for VLSI implementations of twodimensional lattice computations of the type arising in the simulation of physical systems. It is shown by pebbling arguments that psi = Omega (n/sup 1/) when there are n/sup 2/ processing elements available. If the results must be observed at every generation and if no onchip storage is allowed, the lower bound is the constant 2. The authors then examine four VLSI architectures and show that one of them, the multigeneration sweep architecture also has I/O overhead proportional to n/sup 1/. A closedform for the discrete minimization equation giving the optimal number of generations to compute for the multigeneration sweep architecture is proved.
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