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Issue No.07 - July (1991 vol.40)

pp: 843-852

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.83622

ABSTRACT

<p>The authors introduce input/output (I/O) overhead psi as a complexity measure for VLSI implementations of two-dimensional lattice computations of the type arising in the simulation of physical systems. It is shown by pebbling arguments that psi = Omega (n/sup -1/) when there are n/sup 2/ processing elements available. If the results must be observed at every generation and if no on-chip storage is allowed, the lower bound is the constant 2. The authors then examine four VLSI architectures and show that one of them, the multigeneration sweep architecture also has I/O overhead proportional to n/sup -1/. A closed-form for the discrete minimization equation giving the optimal number of generations to compute for the multigeneration sweep architecture is proved.</p>

INDEX TERMS

input/output overhead; parallel VLSI architectures; complexity measure; VLSI implementations; lattice computations; physical systems; multigeneration sweep architecture; computational complexity; lattice theory and statistics; parallel architectures; physics computing.

CITATION

M.H. Nodine, D.P. Lopresti, J.S. Vitter, "I/O Overhead and Parallel VLSI Architectures for Lattice Computations",

*IEEE Transactions on Computers*, vol.40, no. 7, pp. 843-852, July 1991, doi:10.1109/12.83622