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IEEE Transactions on Computers
July 1991 (vol. 40 no. 7)
ISSN: 0018-9340
Table of Contents
PAPERS
A Real-Time Locking Protocol
(Abstract)
L. Sha
R. Rajkumar
S.H. Son
C.-H. Chang
pp. 793-800
ABSTRACT
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Asynchronous Disk Interleaving: Approximating Access Delays
(Abstract)
M.Y. Kim
A.N. Tantawi
pp. 801-810
ABSTRACT
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The Formal Description and Verification of Hardware Timing
(Abstract)
G.J. Milne
pp. 811-826
ABSTRACT
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Parallel Algorithms for Image Processing on OMC
(Abstract)
M.M. Eshaghian
pp. 827-833
ABSTRACT
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Performance Analysis of Multiple Bus Interconnection Networks with Hierarchical Requesting Model
(Abstract)
Wen Tsuen Chen
Jang-Pin Sheu
pp. 834-842
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I/O Overhead and Parallel VLSI Architectures for Lattice Computations
(Abstract)
M.H. Nodine
D.P. Lopresti
J.S. Vitter
pp. 843-852
ABSTRACT
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Embedding Complete Binary Trees Into Butterfly Networks
(Abstract)
A.K. Gupta
S.E. Hambrusch
pp. 853-863
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CORRESPONDENCE
Translation of the Problem of Complete Test Set Generation to Pseudo-Boolean Programming
(Abstract)
P.R. Bhattacharjee
S.K. Basu
J.C. Paul
pp. 864-867
ABSTRACT
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Aliasing Probabilities for Feedback Signature Compression of Test Data
(Abstract)
J.P. Robinson
pp. 867-873
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A VLSI Modulo m Multiplier
(Abstract)
G. Alia
E. Martinelli
pp. 873-878
ABSTRACT
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Load Balancing in a Hybrid ATPG Environment
(Abstract)
W. Daehn
pp. 878-882
ABSTRACT
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A Modular Fault-Tolerant Binary Tree Architecture with Short Links
(Abstract)
A.D. Singh
H.Y. Youn
pp. 882-890
ABSTRACT
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