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Automatic Test Pattern Generation with Branch Testing
June 1991 (vol. 40 no. 6)
pp. 785-791

The authors present a test algorithm for finite state machines called branch testing. Based on branch testing, a design-for-test (DFT) method is proposed. Comparisons to other DFT methods show the method to be competitive relative to circuit overhead. A minimum set of paths containing all primary and internal gate-level input/output lines is found. Each of these paths is then sensitized so as to detect all single stuck-at faults. The authors demonstrated that the one-hot encoded FSMs can be easily and thoroughly tested via a simple algorithm. It is demonstrated that the use of scan paths is not necessary if a one-hot encoded state assignment is made. The synthesis and simulation resulting have shown that the package of one-hot encoding and branch testing constitutes a viable design and test approach.

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Index Terms:
branch testing; test algorithm; finite state machines; design-for-test; gate-level input/output lines; stuck-at faults; scan paths; simulation; automatic testing; fault location; logic testing.
Citation:
R.-Z. Makki, S. Bou-Ghazale, C. Tianshang, "Automatic Test Pattern Generation with Branch Testing," IEEE Transactions on Computers, vol. 40, no. 6, pp. 785-791, June 1991, doi:10.1109/12.90257
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