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IEEE Transactions on Computers
July 1990 (vol. 39 no. 7)
ISSN: 0018-9340
Table of Contents
Editor's Notice
Editor's Notice
(Abstract)
M.T. Liu
pp. 853-854
ABSTRACT
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PURCHASE ARTICLE: $19
1989 Referee List
1989 Referee List
(Abstract)
pp. 855-857
ABSTRACT
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PAPERS
On Job Assignment for a Parallel System of Processor Sharing Queues
(Abstract)
F. Bonomi
pp. 858-869
ABSTRACT
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Minimal Order Loop-Free Routing Strategy
(Abstract)
K.G. Shin
M.S Chen
pp. 870-881
ABSTRACT
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An Efficient Deadlock Avoidance Technique
(Abstract)
F. Belik
pp. 882-888
ABSTRACT
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(SM)/sup 2/-II: A Large-Scale Multiprocessor for Sparse Matrix Calculations
(Abstract)
H. Amano
T. Boku
T. Kudoh
pp. 889-905
ABSTRACT
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Performance Analysis of Real-Time Software Supporting Fault-Tolerant Operation
(Abstract)
K. Kant
pp. 906-918
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Dynamic Processor Self-Scheduling for General Parallel Nested Loops
(Abstract)
Z. Fang
P. Tang
P.-C. Yew
C.Q. Zhu
pp. 919-929
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The Jitter Model for Metastability and its Application to Redundant Synchronizers
(Abstract)
L. Kleeman
pp. 930-942
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CORRESPONDENCE
Constructing Optimal Procedures for Testing Series Systems
(Abstract)
C.-L. Yang
pp. 943-945
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Clock Skew Optimization
(Abstract)
J.P. Fishburn
pp. 945-951
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Performance Analysis of a Message-Oriented Knowledge-Base
(Abstract)
W.-C. Wong
T. Suda
L. Bic
pp. 951-957
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An Efficient Channel Routing Algorithm to Yield an Optimal Solution
(Abstract)
J.-S. Wang
R.C.T. Lee
pp. 957-962
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Notes on Shuffle/Exchange Type Permutation Sets
(Abstract)
S.-T. Huang
pp. 962-965
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The B-Network: A Multistage Interconnection Network with Backward Links
(Abstract)
K.Y. Lee
H. Yoon
pp. 966-969
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Analysis of Checksums, Extended-Precision Checksums, and Cyclic Redundancy Checks
(Abstract)
N.R. Saxena
E.J. McCluskey
pp. 969-975
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Markovian Queueing Network Models for Performance Analysis of a Single-Bus Multiprocessor System
(Abstract)
I.H. Onyuksel
K.B. Irani
pp. 975-980
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Peer Review Notice
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