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The Ballast Methodology for Structured Partial Scan Design
April 1990 (vol. 39 no. 4)
pp. 538-544

An efficient partial scan technique called Ballast (balanced structure scant test) is presented. Scan path storage elements (SPSEs) are selected such that the remainder of the circuit has certain desirable testability properties. A complete test set is obtained using combinatorial automatic test pattern generation (ATPG). Some SPSEs may need to be provided with a HOLD mode; their number is minimized by ordering the registers in the scan path and formatting the test patterns appropriately. This methodology leads to a low area overhead and allows 100% coverage of irredundant faults.

[1] E. Trischler, "Design for testability using incomplete scan path and testability analysis,"Siemens Forsch.- u. Entwickl.-Ber., vol. 13, no. 2, pp. 56-61, 1984.
[2] H-K. T. Ma, S. Devadas, A. R. Newton, and A. Sangiovanni-Vincentelli, "An incomplete scan design approach to test generation for sequential machines," inProc. Int. Test Conf., Sept. 1988, pp. 730-734.
[3] K.-T. Cheng and V. D. Agrawal, "An economical scan design for sequential logic test generation," inProc. Fault-Tolerant Comput. Symp. (FTCS-19), June 1989, pp. 28-35.
[4] V. D. Agrawal, K.-T. Cheng, D. D. Johnson, and T. Lin, "A complete solution to the partial scan problem," inProc. IEEE Int. Test Conf., 1987, pp. 44-51.
[5] A. Kunzmann, "Produktionstest synchroner Schaltwerke auf der Basis von Pipeline-strukturen," inProc. 18. Jahrestagung der Gesellschaft für Informatik, Hamburg, 1988, pp. 92-105, Informatik-Fachberichte 188, Springer-Verlag.
[6] A. Miczo,Digital Logic Testing and Simulation. New York: Harper and Row, 1986.
[7] R. Gupta, R. Gupta, and M. Breuer, "BALLAST: A Methodology for Partial Scan Design,"Proc. Int'l Symp. Fault-Tolerant Computing, IEEE Computer Society Press, Los Alamitos, Calif., 1989, pp. 118- 125.
[8] R. Gupta, R. Gupta, and M. A. Breuer, "A methodology for partial scan design using balanced sequential structures," Tech. Rep. CRI-88-59, Univ. of Southern California, Dep. Elec. Eng.-Syst., Dec. 1988.
[9] M. R. Garey and D. S. Johnson,Computers and Intractability: A Guide to Theory of NP-Completeness. San Francisco, CA: Freeman, 1979.
[10] H. W. Lenstra, "The acyclic subgraph problem," Tech. Rep. BW 26/73, Mathematical Centre, 49, 2e Boerhaavestraat, Amsterdam, July 1973.
[11] R. Endre Tarjan,Data Structures and Network Algorithms, Society for Industrial and Applied Mathematics, 1983.

Index Terms:
scan path storage elements; Ballast methodology; structured partial scan design; balanced structure scant test; testability properties; combinatorial automatic test pattern generation; automatic testing; combinatorial circuits; logic testing; sequential circuits.
Citation:
R. Gupta, R. Gupta, M.A. Breuer, "The Ballast Methodology for Structured Partial Scan Design," IEEE Transactions on Computers, vol. 39, no. 4, pp. 538-544, April 1990, doi:10.1109/12.54846
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