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An Efficient TSC 1-out-of-3 Code Checker
March 1990 (vol. 39 no. 3)
pp. 407-411

A design method for a combinational totally self-checking (TSC) 1-out-of-3 code checker is presented. This method is not only simpler and more efficient than others, but is also successful in the case where more than one 1-out-of-3 code exists in a TSC system.

[1] W. C. Carter and P. R. Schneider, "Design of dynamically checked computers," inProc. IFIP Congr. 68, vol. 2, 1968, pp. 878-883.
[2] D. A. Anderson, "Design of self-checking digital networks using coding techniques," Urbana, CSL/Univ. of Illinois, Rep. 527, Sept. 1971.
[3] D. A. Anderson and G. Metze, "Design of totally self-checking check circuits form/ncodes,"IEEE Trans. Comput., vol. C-22, pp. 263- 269, Mar. 1973.
[4] V. I. Maznev, "Design of self-checking 1/p checkers,"Automat. Remote Contr., vol. 39, part 2, pp. 1380-1383, Sept. 1978.
[5] M. Kotokova, "Design of totally self-checking check circuits for some 1/n codes," inProc. FTSD-4, Brno, Czechoslovakia, Sept. 1981, pp. 241-245.
[6] V. Rabara, "Design of self-checking checker for 1/n codes," inProc. FTSD-4, Czechoslovakia, Sept. 1981, pp. 234-240.
[7] V. Rabara, "Three level totally self-checking checkers for 1/n codes," inProc. FTSD-8, Sept. 1985.
[8] J. Khakbaz, "Totally self-checking checkers for 1/ncodes using two-rail codes,"IEEE Trans. Comput., vol. C-31, pp. 667-681, July 1982.
[9] S. Piestrak, "Design of self-testing checkers for 1/n codes," inProc. FTSD-6, Sept. 1983, pp. 57-63.
[10] C. Efstathiou and C. Halatsis, "Modular design of TSC for 1/n codes," inProc. 2nd GI/NTG/GMR Conf. Fault-Tolerant Comput. Syst., Bonn, W. Germany, Sept. 1984, pp. 164-176.
[11] G. Laskaris, T. Haniotakis, A. Paschalis, and D. Nikolos, "Efficient design of TSC checkers for 1-out-of-n codes in MOS transistor implementation," inProc. FTSD-12, Czechoslovakia, Sept. 1989.
[12] R. David, "Totally self-checking 1-out-of-3 code checker,"IEEE Trans. Comput., vol. C-27, pp. 570-572, June 1978.
[13] P. Golan, "Design of totally self-checking checker for 1-out-of-3 code,"IEEE Trans. Comput., vol. C-33, p. 285, Mar. 1984.
[14] D. Tao, P. K. Lala, and C. R. P. Hartmann, "A MOS implementation for totally self-checking checker for 1-out-of-3 code,"IEEE J. Solid-State Circuit, vol. 23, no. 3, pp. 857-877, June 1988.
[15] S. M. Reddy, "A note on self-checking checkers,"IEEE Trans. Comput., vol. C-23, pp. 1100-1102, Oct. 1974.
[16] P. Banerjee and J. A. Abraham, "Fault characterization of VLSI circuits," inProc. IEEE Int. Conf. Circuits Comput., Sept. 1982, pp. 564-568.
[17] Y. Crouzet and C. Landrault, "Design of self-checking MOS-LSI circuits: Application to a four-bit microprocessor,"IEEE Trans. Comput., vol. C-29, pp. 532-537, June 1980.
[18] N. Jha and J. Abraham, "Totally self-checking MOS circuits under realistic physical failures," inProc. Int. Conf. Comput. Design, Port Chester, NY, Oct. 1984.
[19] A. M. Paschalis, D. Nikolos, and C. Halatsis, "Efficient modular design of TSC checkers form/2mcodes,"IEEE Trans. Comput., vol. C-37, pp. 301-309, Mar. 1988.
[20] I. Janch and B. Courtois, "SCD checkers, cellular checkers and multichecker structures," IMAG Rep., RP 476, Nov. 1984.
[21] J. Smith, "The design of TSC check circuits for a class of unorder codes,"J. Design Automat. Fault-Tolerant Comput., vol. 1, pp. 321-342, Oct. 1977.
[22] N. Jha and J. Abraham, "Techniques for efficient MOS implementation of TSC checkers," inProc. FTCS-15, June 1985, pp. 430-435.

Index Terms:
TSC 1-out-of-3 code checker; combinational totally self-checking; automatic testing; integrated logic circuits; logic design; logic testing.
Citation:
A.M. Paschalis, C. Efstathiou, C. Halatsis, "An Efficient TSC 1-out-of-3 Code Checker," IEEE Transactions on Computers, vol. 39, no. 3, pp. 407-411, March 1990, doi:10.1109/12.48873
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