|
| This Article | ||
| ||
| Share | ||
| Bibliographic References | ||
| Add to: | ||
 Digg  Furl  Spurl  Blink  Simpy  Google  Del.icio.us  Y!MyWeb | ||
| Search | ||
| ||
| ASCII Text | x | ||
| M.L. Brady, M. Sarrafzadeh, "Stretching a Knock-Knee Layout for Multilayer Wiring," IEEE Transactions on Computers, vol. 39, no. 1, pp. 148-151, January, 1990. | |||
| BibTex | x | ||
| @article{ 10.1109/12.46293, author = {M.L. Brady and M. Sarrafzadeh}, title = {Stretching a Knock-Knee Layout for Multilayer Wiring}, journal ={IEEE Transactions on Computers}, volume = {39}, number = {1}, issn = {0018-9340}, year = {1990}, pages = {148-151}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.46293}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Stretching a Knock-Knee Layout for Multilayer Wiring IS - 1 SN - 0018-9340 SP148 EP151 EPD - 148-151 A1 - M.L. Brady, A1 - M. Sarrafzadeh, PY - 1990 KW - knock-knee layout stretching; VLSI; multilayer wiring; knock-knee mode; optimal algorithm; 4/3 approximation algorithm; NP-complete; circuit layout CAD; VLSI. VL - 39 JA - IEEE Transactions on Computers ER - | |||
The problem of stretching a knock-knee layout in the knock-knee mode to ensure its wirability is considered. An optimal algorithm for the problem in two layers is presented. A 4/3 approximation algorithm for the corresponding problem in three layers, shown to be NP-complete, is devised.
[1] T. Bolognesi and D. J. Brown, "A channel routing algorithm with bounded wire length," unpublished manuscript. Coordinated Sci. Lab., Univ. of Illinois, Urbana-Champaign, 1982.
[2] M. Brady and D. J. Brown, "VLSI routing: Four layers suffice," inAdvances in Comp. Research Vol. 2, VLSI Theory, F. P. Preparata, Ed. Greenwich, CT: JAI, 1984, pp. 245-257.
[3] A. Frank, "Disjoint paths in a rectangular grid,"Combinatorica, vol. 2, no. 4, pp. 361-371, 1982.
[4] U. I. Gupta, D. T. Lee, and J. Y.-T. Leung, "An optimal solution for the channel-assignment problem,"IEEE Trans. Comput., vol. C-28, pp. 807-810, Nov. 1979.
[5] M. Kaufmann and K. Mehlhorn, "On local routing of multiterminal nets," manuscript, Universitat des Saarlandes, Mar. 1986.
[6] F. T. Leighton, "New lower bounds for channel routing," MIT VLSI Memo 82-71 1981.
[7] W. Lipski, Jr., "On the structure of three-layer wirable layouts," inAdvances in Computing Research, Vol. 2 VLSI Theory, F. P. Preparata, Ed. Greenwich, CT: JAI, 1984, pp. 231-243.
[8] W. Lipski and F. P. Preparata, "An elementary theory of layout wirability," Tech. Rep. ACT-54, Coordinated Sci. Lab., Uni. of Illinois at Urbana-Champaign, Mar. 1985, to appear inMath. Syst. Theory.
[9] P. M. Chu and M. T. Liu, "Synthesizing protocol specifications from service specifications," inProc. IEEE Computer Networking Symp., 1988, pp. 173-182,
[10] F. P. Preparata and W. Lipski, Jr., "Optimal three-layer channel routing,"IEEE Trans. Computers, vol. C-33, pp. 427-437, 1984.
[11] R. L. Rivest, A. Baratz, and G. Miller, "Provably good channel routing algorithms," inProc. 1981 CMU Conf. VLSI Syst. Computat., Oct. 1981, pp. 153-159.
[12] M. Sarrafzadeh, "Hierarchical approaches to VLSI circuit layout," Tech. Rep., Univ. of Illinois-Urbana, 1986.