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| M.G. Karpovsky, P. Nagvajara, "Optimal Robust Compression of Test Responses," IEEE Transactions on Computers, vol. 39, no. 1, pp. 138-141, January, 1990. | |||
| BibTex | x | ||
| @article{ 10.1109/12.46290, author = {M.G. Karpovsky and P. Nagvajara}, title = {Optimal Robust Compression of Test Responses}, journal ={IEEE Transactions on Computers}, volume = {39}, number = {1}, issn = {0018-9340}, year = {1990}, pages = {138-141}, doi = {http://doi.ieeecomputersociety.org/10.1109/12.46290}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - JOUR JO - IEEE Transactions on Computers TI - Optimal Robust Compression of Test Responses IS - 1 SN - 0018-9340 SP138 EP141 EPD - 138-141 A1 - M.G. Karpovsky, A1 - P. Nagvajara, PY - 1990 KW - optimal robust compression; test responses; built-in self-test; VLSI design; statistics; fault-free responses; pseudorandom testing; error detectability; automatic testing; data compression; integrated circuit testing; logic testing; VLSI. VL - 39 JA - IEEE Transactions on Computers ER - | |||
A compression of test responses technique for a built-in self-test (BIST) VLSI design is presented. The authors introduce the notion of a robust compression technique which incorporates prior knowledge of the statistics of fault-free responses under pseudorandom testing to achieve a guaranteed error detectability independent of a distribution of errors. The presented robust quadratic compressor requires two r-bit registers (r-bit signature) more than a multiple-input linear feedback shift register; however, it provides for equal protection against all error patterns. Therefore, quadratic compressors are optimal and robust with respect to a statistics of errors in a device under test.
[1] M. Karpovsky, "Universal tests detection of input/output stuck-at and bridging faults,"IEEE Trans. Comput., vol. C-32, pp. 1194-1198, Dec. 1983.
[2] K. K. Saluja and M. G. Karpovsky, "Testing computer hardware through data compression in space and time," inProc. IEEE Int. Test Conf., 1983, pp. 83-88.
[3] S. R. Reddy, K. K. Saluja, and M. G. Karpovsky, "A data compression technique for test responses,"IEEE Trans. Comput., vol. C-38, pp. 1151-1156, Sept. 1988.
[4] J. P. Robinson and N. R. Saxena, "A unified view of test compression methods,"IEEE Trans. Comput., vol. C-36, no. 1, pp. 94-99, Jan. 1987.
[5] E. J. McCluskey and S. Bozorgui-Nesbat, "Design for autonomous test,"IEEE Trans. Comput., vol. C-30, pp. 866-875, Nov. 1981.
[6] P. H. Bardell, W. H. McAnney, and J. Savir,Built-In Test for VLSI: Pseudorandom Techniques. New York: Wiley, 1987.
[7] J. Savir, G. S. Ditlow, and P. H. Bardell, "Random patterns testability,"IEEE Trans. Comput., vol. C-33, pp. 79-90, Jan. 1984.
[8] J. E. Smith, "Measure of effectiveness of fault signature analysis,"IEEE Trans. Comput., vol. C-29, pp. 510-514, June 1980.
[9] R. David, "Testing by feedback shift register,"IEEE Trans. Comput., vol. C-29, pp. 668-673, July 1980.
[10] T. W. Williams, W. Daehn, M. Gruetzner, and C. W. Starke, "Comparison of aliasing errors for primitive and nonprimitive polynomials," inProc. IEEE Int. Test Conf., 1986, pp. 282-288.
[11] M. G. Karpovsky,Finite Orthogonal Series in The Design of Digital Devices. New York: Wiley, 1976.
[12] R. Lidl and H. Niederreiter,Finite Field. Reading, MA: Addison-Wesley, 1983.
[13] M. G. Karpovsky and P. Nagvajara, "Functions with 'flat' autocorrelation and their generalizations," inProc. IEEE 3rd Int. Workshop Spectral Techniques, 1988, pp. 56-66.
[14] A. Gill,Linear Sequential Circuits--Analysis, Synthesis and Application. New York: McGraw-Hill, 1966.

