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A VLSI Architecture for Fast Inversion in GF(2/sup m/)
October 1989 (vol. 38 no. 10)
pp. 1383-1386
A new algorithm for performing fast inversion in GF (2/sup m/) is presented. The algorithm requires O(mlog/sub 2/ m) computation time. Using serial-in-parallel-out multiplication, the design of the algorithm is highly regular, modular, and well suited for VLSI implementation.

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Index Terms:
fast inversion; GF (2/sup m/); serial-in-parallel-out multiplication; VLSI implementation; computational complexity; digital arithmetic.
Citation:
G.-L. Feng, "A VLSI Architecture for Fast Inversion in GF(2/sup m/)," IEEE Transactions on Computers, vol. 38, no. 10, pp. 1383-1386, Oct. 1989, doi:10.1109/12.35833
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