Issue No.10 - October (1989 vol.38)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/12.35833
A new algorithm for performing fast inversion in GF (2/sup m/) is presented. The algorithm requires O(mlog/sub 2/ m) computation time. Using serial-in-parallel-out multiplication, the design of the algorithm is highly regular, modular, and well suited for VLSI implementation.
fast inversion; GF (2/sup m/); serial-in-parallel-out multiplication; VLSI implementation; computational complexity; digital arithmetic.
G.-L. Feng, "A VLSI Architecture for Fast Inversion in GF(2/sup m/)", IEEE Transactions on Computers, vol.38, no. 10, pp. 1383-1386, October 1989, doi:10.1109/12.35833