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A VLSI Architecture for Fast Inversion in GF(2/sup m/)
October 1989 (vol. 38 no. 10)
pp. 1383-1386
A new algorithm for performing fast inversion in GF (2/sup m/) is presented. The algorithm requires O(mlog/sub 2/ m) computation time. Using serial-in-parallel-out multiplication, the design of the algorithm is highly regular, modular, and well suited for VLSI implementation.

[1] W. W. Peterson and E. J. Weldon,Error-Correcting Codes. Cambridge, MA: MIT Press, 1972.
[2] E. R. Berlekamp,Algebraic Coding Theory. New York: McGraw-Hill, 1968.
[3] F. J. MacWilliams and N. J. A. Sloane,The Theory of Error-Correcting Codes. New York: North-Holland, 1977.
[4] D.E. Denning,Cryptography and Data Security, Addison-Wesley Publishing Co., Reading, Mass., 1982.
[5] B. Benjauthrit and I. S. Reed, "Galois switching functions and their applications,"IEEE Trans. Comput., vol. C-25, pp. 78-86, Jan. 1976.
[6] I. S. Reed and T. K. Truong, "The use of finite fields to compute convolutions,"IEEE Trans. Inform. Theory, vol. IT-21, Mar. 1975.
[7] C. S. Yeh, I. S. Reed, and T. K. Truong, "Systolic multipliers for finite fieldsGF(2m),"IEEE Trans. Comput., vol. C-33, pp. 357- 360, Apr. 1984.
[8] B. A. Law and C. K. Rushforth, "A cellular-array multiplier forGF(2m),"IEEE Trans. Comput., vol. C-20, pp. 1573-1578, Dec. 1971.
[9] R. F. Lyon, "Two's complement pipeline multipliers,"IEEE Trans. Commun., vol. COM-24, no. 4, pp. 418-425, Apr. 1976.
[10] P. A. Scott, S. E. Tarvares, and L. E. Peppard, "A fast multiplier forGF(2m),"IEEE J. Select. Areas Commun., vol. SAC-4, Jan. 1986.
[11] C. C. Wang, T. K. Truong, H. M. Shao, L. J. Deutsch, J. K. Omura, and I. S. Reed, "VLSI architecture for computing multiplications and inverses in GF(2m),"IEEE Trans. Comput., vol. C-34, pp. 709-716, Aug. 1985.
[12] J. L. Massey and J. K. Omura, "Computational method and apparatus for finite field arithmetic," U. S. Patent Application, to appear.

Index Terms:
fast inversion; GF (2/sup m/); serial-in-parallel-out multiplication; VLSI implementation; computational complexity; digital arithmetic.
G.-L. Feng, "A VLSI Architecture for Fast Inversion in GF(2/sup m/)," IEEE Transactions on Computers, vol. 38, no. 10, pp. 1383-1386, Oct. 1989, doi:10.1109/12.35833
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